Apple, PPC 980, and Upcoming G5s

[MacRumors]

An unconfirmed report spelling out some interesting future possibilities about Apple and their PowerPC progress and development:

"Following the microprocessor forum, IBM presented Apple with a handful of PPC 980 alpha samples to begin work on the next generation Powermac due out in 9-12 months. Initial compiler tests showed specfp base 2000 of 1400 and specint of 1200 at 3Ghz. The PPC 980 will have double the L2 cache of the 970, and will still not have an L3 cache option, owing to the fact that the 980 will have a 1x, 2x, 3x, and 4x bus multiplier, which will allow an FSB to run at the chip clock speed if need be, but the plans are to stick to a 2x multiplier, which would mean a 1.5Ghz FSB. The reason why the 980 is appearing only 12 -16 months after the 970 is that Apple chose to engage in parallel development with the Power 5, rather than wait 12-18 months after the fact. The 980 samples that were given to Apple were 90nm chips, as opposed to 130nm chips for the PPC 970 and the Power 5.

For the G5, the next revision is well under way. The bugs on IBM's 90nm process have been squashed, and ramp up will begin within 6 weeks, with intention of having enough chips ready for the next revision G5's due in February. 2.5 - 2.8 Ghz is probably going to be the ceiling of the new revision Powermac G5's based on test yields obtained recently. If everything goes well, 2Ghz may drop out of the equation entirely, and 2.2 Ghz may become the low end, a jump of 500-600 Mhz this revision is realistic, and should be expected. As for the Powerbook G5, only a general timeline is given with a range from April 2004-September 2004 is given, the only obstacle being finding an appropriate cooling technology."

[x86isslow]

good to hear! i personally wont be able to afford the 3Ghz, but hey, mebbe the 1.6Ghz will drop down to a comfy price

[DTphonehome]

Things are speeding up in Macland :D

[x86isslow]

and this should put an end to all the nonsense about the amd chips beating g5s.

[1macker1]

"Next generation powermac" What product will this be. I'm gearing to buy a powerbook late December early Feburary. I dont want them to drop a newer PB right after I get one. I couild wait as long as 9 months if need be. Anyone care to guess what the next gen powermac will be?

[dongmin]

For the G5, the next revision is well under way. The bugs on IBM's 90nm process have been squashed, and ramp up will begin within 6 weeks, with intention of having enough chips ready for the next revision G5's due in February. 2.5 - 2.8 Ghz is probably going to be the ceiling of the new revision Powermac G5's based on test yields obtained recently. If everything goes well, 2Ghz may drop out of the equation entirely, and 2.2 Ghz may become the low end, a jump of 500-600 Mhz this revision is realistic, and should be expected. This is incredible, if true. Increase of 30-40% in only 4 months (from when they started shipping in early Oct.)!!! Now I'm glad I held off on the first round.

Could we see:
Fast: 2 ghz single
Faster: dual 2.4 ghz
Fastest: dual 2.8 ghz?

that would blow people away, as much as they were the first time around.

[ZildjianKX]

Don't get your hopes up...

This would be a very different Apple trend, but it would be nice if comes true.

[Catfish_Man]

2GHz 970 = 800/840
3GHz 980 = 1200/1400

change in clock frequency = 1.5
change in SPECint = 1.5
change in SPECfp = 1.666

overall: supralinear scaling with clock frequency (wouldn't be possible without other enhancements)

comments: Excellent, if it's true. Also, I doubt that significant changes have been made if it's being developed in parallel with the POWER5. It sounds as though they're just rushing it to .09 micron as quick as possible (doubling the cache with a process shrink is pretty easy. Other changes are harder). I would guess that the revision after this one would incorporate POWER5 changes.

[Makosuke]

These numbers sound so good I'm skeptical, but then again they're not out of the realm of possibility now that Apple's working with IBM.

I sure hope they're true (although I'll be bumming about my "measly" 2.0 if we see a dual 2.8s in Feburary).

[1macker1]

Dual Processor Powerbooks!!!!! That's has to be next. The g5 chip isn't coming to the PB anytime soon.

[x86isslow]

i think if you re-read the article, it says that the next revision of the G5 is different from the 980, so i doubt speeds up to dual 2.8 by feb.

[T.Rex]

Originally posted by x86isslow
and this should put an end to all the nonsense about the amd chips beating g5s.

It is hardly nonsense; while the G5's put Apple back in the game, it was hardly the knockout punch that we were led to believe. Right now, if I were in need of the absolute fastest machine for a workstation, there would be an AMD chip inside - be it the Athlon64-fx or more likely, an Opteron.

And I don't care what anyone says, such a computer would be cheaper, too. :(

[mvc]

Man, I'd be happy just if the dual 2Ghz became the mid range machine - cos then I could maybe afford it come february.

Isn't it refreshing to even consider a 500 mhz speed increase as being plausible. Seems we were stuck around the magic 1.2 - 1.4GHz for so long, now it looks like we may actually see our raw processor speed double in a year.

Moores law lives, at least in Mac land!

[Genie]

Seems plausible, but you never know. I'm happy with the one I have now.

[mvc]

Originally posted by T.Rex
It is hardly nonsense; while the G5's put Apple back in the game, it was hardly the knockout punch that we were led to believe.…

Hey T.Rex, stop talking like a dinosaur.
The G5 was a mass extinction event for most of the Mac Haters out there.
Evolve or Die!
;)

[Steven1621]

let the new rumors commence!!!!!!

[mvc]

Originally posted by Steven1621
let the new rumors commence!!!!!!

Absolutely, it's been nothing but hard facts on this board for days now. Where have all the dubious rumours gone? :p

We need more grist for the speculative mill and the pointless G5 powerbook flame wars!

I blame Apple, how can a poor rumour site survive when they keep actually launching new hardware, software and services at this current rate! ;)

[arn]

Take with usual skepticism for unconfirmed rumors.

arn

[tpjunkie]

even so....

*drool*

A FSB that could run at processor speed? As Keanu Reeves would say, "Whoa."

[Oirectine]

Originally posted by mvc
Hey T.Rex, stop talking like a dinosaur.
The G5 was a mass extinction event for most of the Mac Haters out there.
Evolve or Die!
;)


That was so clever it made me want to vomit.

Good job :)

[manu chao]

Originally posted by 1macker1
Dual Processor Powerbooks!!!!! That's has to be next. The g5 chip isn't coming to the PB anytime soon.

I'll be the first one to buy one when they come out. The only time when I really need more power is when, I'm doing several things in parallel. Installing a new security patch for Windows in VPC, listening to music, and editing a document in Illustrator, and my 1Ghz Powerbook slows to a crawl.

[Freg3000]

Happy, happy, joy, joy!

This is wonderful. Big Blue = Big Speeds. :D

[NNO-Stephen]

oohhh, how nice. dual processor PowerBooks aren't gonna happen though. would require too much space and would be even hotter. I do think we could see a 2.0Ghz or so PowerBook G5 though with a die shrink to 90nm. they would have to have some sort of liquid cooling system though, which IBM already has in some Think Pads. :) IBM for processors, as well as the cooling technology, why not? makes perfect sense. but man, a dual 2.8Ghz G5 by February! good greif. sign me up for that one :)

[wrylachlan]

Originally posted by Catfish_Man
2GHz 970 = 800/840
3GHz 980 = 1200/1400

change in clock frequency = 1.5
change in SPECint = 1.5
change in SPECfp = 1.666

overall: supralinear scaling with clock frequency (wouldn't be possible without other enhancements)

comments: Excellent, if it's true. Also, I doubt that significant changes have been made if it's being developed in parallel with the POWER5. It sounds as though they're just rushing it to .09 micron as quick as possible (doubling the cache with a process shrink is pretty easy. Other changes are harder). I would guess that the revision after this one would incorporate POWER5 changes.

This seems fishy in that its kind of underwhelming. Not the overall speed increase, but the spec scores per clock. If the 980 is based on the Power5 then there should be a more significant per clock increase in spec scores as the Power5 is a significant increase on the Power4 which the 970 is based on. And the original article implies that the 980 is using the Power5 as a base just working in parallel development instead of waiting for the Power5 to be finished...

[Frobozz]

This all sounds plausible. I have a Quicksilver DP 1 Ghz machine and it feels snappier than when I bought it, thanks in part to Panther. I figured that my next machine would be a Dual 3.0 Ghz G5, and it looks like next June will be the timeframe. Perfect... right after I get married... no more wedding expenses. :-)

Apple could hardly be doing anything better these days. I really have to give it to them: it seems like their CPU problems are *finally* resolved. I would like to see the PB G5, or a snappier PB G4, however.

[x86isslow]

well better to be pleasantly surprised in feb than dissapointed.

This seems fishy in that its kind of underwhelming.;)

[wrldwzrd89]

This is very interesting news. I hope Power PC 980 (if indeed it is called that) development goes well (don't we all?). I haven't yet decided exactly when I'll get a new computer, but this news may help me make my decision sooner!

[vannote]

Originally posted by T.Rex
It is hardly nonsense; while the G5's put Apple back in the game, it was hardly the knockout punch that we were led to believe. Right now, if I were in need of the absolute fastest machine for a workstation, there would be an AMD chip inside - be it the Athlon64-fx or more likely, an Opteron.

And I don't care what anyone says, such a computer would be cheaper, too. :(

I just configured a Dual 2 GHz. Opteron w/2GB of memory over at the BOXX Technologies online store and an equivalent G5 at Apple's store and the Opteron was not cheaper, not by a long shot.

There may be cheaper places to get the Opteron but I didn't spend a lot of time looking.

Regards

[x86isslow]

:o yah, amd runs word and a game faster than a g5 woot! lets celebrate that a winamd machine runs a microsoft application better.


It is hardly nonsense; while the G5's put Apple back in the game, it was hardly the knockout punch that we were led to believe. Right now, if I were in need of the absolute fastest machine for a workstation, there would be an AMD chip inside - be it the Athlon64-fx or more likely, an Opteron.

i thought that office x wasnt as fast as office for xp. mebbe one day, they'll try optimized tests.

[Dont Hurt Me]

Its very good to hear of cpu developement. so it looks like the g5 is running almost twice as fast as the g4. if this report is true it should a great year coming. you know steve aint going to sit on those g5s.:eek:

[manu chao]

PowerBooks aren't gonna happen though. would require too much space and would be even hotter

If a 1'' thick 15"Ti-book can contain one processor (and all the rest), why shouldn't there be enough space in a 1'' thick 17'' Powerbook for two processors? It would require a redesign, which could be too costly for Apple admittedly. Nobody knows precise numbers for the G5, but the 7447/57s are below 10W, and the two processors could be placed a little bit apart. Battery life will suffer, but one could always disable one proc while on battery. It's a markting and cost issue, not a technical one.

[iHack]

Originally posted by Dont Hurt Me
Its very good to hear of cpu developement. so it looks like the g5 is running almost twice as fast as the g4. if this report is true it should a great year coming. you know steve aint going to sit on those g5s.:eek:

They'll be running to hot to sit on?
Will give you BBS*, right? ;)

M.

* Baked Buns Syndrome

[legion]

Originally posted by NNO-Stephen
they would have to have some sort of liquid cooling system though, which IBM already has in some Think Pads. :) IBM for processors, as well as the cooling technology, why not? makes perfect sense. but man, a dual 2.8Ghz G5 by February! good greif. sign me up for that one :)

Ummm, no... IBM does not have a liquid cooling system in any of its ThinkPads or even in its proto-type ThinkPads shown at developer conferences. Even with the ATI T2 FireGL 128MB graphics in the newer R50p and T41p, there's been no need for such drastic cooling needs.

[Powerbook G5]

I just wish I had a nice IBM PPC processor in my PowerBook.

[NNO-Stephen]

Originally posted by manu chao
If a 1'' thick 15"Ti-book can contain one processor (and all the rest), why shouldn't there be enough space in a 1'' thick 17'' Powerbook for two processors? It would require a redesign, which could be too costly for Apple admittedly. Nobody knows precise numbers for the G5, but the 7447/57s are below 10W, and the two processors could be placed a little bit apart. Battery life will suffer, but one could always disable one proc while on battery. It's a markting and cost issue, not a technical one.

yeah, they COULD do it, but it would be too costly. hardware redesign for one revision, that and the fact that they would have to buy two processors for each machine thereby raising the cost of each portable for the consumer... they are hgih enough thanks.

and about IBM not having liquid cooling?

stuff it http://www.research.ibm.com/thinkresearch/pages/2001/20010808_cooling.shtml

[dho]

Originally posted by Powerbook G5
I just wish I had a nice IBM PPC processor in my PowerBook.

Don't we all :)

[philip]

A few things to consider.

The power thing is somewhat overblown. A G5 running at the same clock speed as the current G4 line wouldn't run so hot. Possibly the next process technology will get the faster models down somewhere reasonable (still probably cooler than the IA32 competition but they have a lot of practice at this).

I would not be suprised if the PPC980 is not as much faster as you'd expect from IBM's high-end designs. The lack of L3 cache is a serious limit to performance. Faster FSB or no, the basic cycle time of DRAM is the limiting factor. If you look at Apple's performance primer (or similar) on the G5, you will see that the latency of DRAM is higher for the G5 than the old G4s, i.e., to fetch 1 byte takes longer, even if continuously streaming is faster.

Given this limitation, scaling SPEC numbers with clock speed is good, though apps for which the on-chip cache is not big enough may suffer. I wonder if this latest design will include any hardware support for multithreading (e.g. as in Intel HyperThreading) which is one way to keep the processor busy while waiting for DRAM.

[applekid]

Originally posted by dho
Don't we all :)

It's called an iBook, duh! :p ;)

Well, it used to be :)

[isgoed]

imagine the consumer line :rolleyes: ....Me, in a couple of months buying a G5 imac with an educational discount.... bliss.

[tbdavis]

Originally posted by T.Rex
And I don't care what anyone says, such a computer would be cheaper, too. :(

Virginia Tech actually did the research, and they went with the G5. For pricing comparisons and FP comparisons, see
this MacSlash article (http://macslash.org/article.pl?sid=03/10/28/2357235&mode=thread)

[applekid]

Originally posted by isgoed
imagine the consumer line :rolleyes: ....Me, in a couple of months buying a G5 imac with an educational discount.... bliss.

And a G6 PowerMac in the professional line :)

Alright, I gotta stop dissing people on the forum. Done it twice already in one thread. But it's not meant to hurt anybody's feelings, FYI. Just little jokes :D

[Phil Of Mac]

If this is true, I'm going to kiss Steve Jobs, and then I'm going to kiss the people at IBM, and then I'm going to give the people at Motorola a roundhouse kick to the groin.

[Catfish_Man]

Originally posted by wrylachlan
This seems fishy in that its kind of underwhelming. Not the overall speed increase, but the spec scores per clock. If the 980 is based on the Power5 then there should be a more significant per clock increase in spec scores as the Power5 is a significant increase on the Power4 which the 970 is based on. And the original article implies that the 980 is using the Power5 as a base just working in parallel development instead of waiting for the Power5 to be finished...

Supralinear scaling with clock frequency is very good. Normally, if you increase the clock frequency the SPEC score doesn't increase by as much as the frequency does.

[TMay]

Originally posted by vannote
I just configured a Dual 2 GHz. Opteron w/2GB of memory over at the BOXX Technologies online store and an equivalent G5 at Apple's store and the Opteron was not cheaper, not by a long shot.

There may be cheaper places to get the Opteron but I didn't spend a lot of time looking.

Regards

There was an excellent article at:

http://www.firingsquad.com/hardware/building_gaming_opteron_2003_Part1/

In part 2 of the article, there was a great deal of discussion about some of the severe limitations in the memory configurations of the P4 and Athlon mobo's. Must read if you are building a PC at all.

In my case, I found that the Tyan dual opteron board can be found for around $500, and (2 ea) 244 Opteron (1.8 Ghz) for about $460 each. Then you need power supply, graphics card, case, drives, memory, etc. Pretty pricey for a build your own system, and I would be surprised if it can be built for much less than a 2Ghz Dual G5. Kind of an eye opener!

[yosoyjay]

Originally posted by legion
Ummm, no... IBM does not have a liquid cooling system in any of its ThinkPads or even in its proto-type ThinkPads shown at developer conferences. Even with the ATI T2 FireGL 128MB graphics in the newer R50p and T41p, there's been no need for such drastic cooling needs.

Actually some ThinkPads do have a kind of liquid cooled system, a kind of radiator, and have since 1999 or 2000. It's called a thermal hinge.

Other laptop makers have implemented similar devices because lots of airflow just isn't desired or possible in the cramped quarters within a laptop.

[ddtlm]

This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months. Intel has been on their 130 nm P4 for just about 2 years, and they have a far far larger number and value of processor sales than IBM. It is very reasonable to assume that the winter G5 refresh will be using exactly the same 130nm PPC970's as are used now, just clocked higher. Even the summer revision might use them, although 3ghz seems pretty fast. When IBM finally does get a 90nm replacement out the door, there's no reason that it has to be related to the Power5. It could be, but it sure would be a lot more cost effective for IBM to slap more L2 on a 970 and call it good for another year, or more.

I hate to break it to everyone, but in the real world, processors do not undergo radical changes very quickly. It just costs to darn much.

TMay:

In part 2 of the article, there was a great deal of discussion about some of the severe limitations in the memory configurations of the P4 and Athlon mobo's. Must read if you are building a PC at all.
PC's and Macs use the same memory technology, if this thing they talk of is a real effect (I think its an error, but who knows) then its gona effect Macs too.

In my case, I found that the Tyan dual opteron board can be found for around $500, and (2 ea) 244 Opteron (1.8 Ghz) for about $460 each. Then you need power supply, graphics card, case, drives, memory, etc. Pretty pricey for a build your own system, and I would be surprised if it can be built for much less than a 2Ghz Dual G5. Kind of an eye opener!
Expensive but absolutely kickin. Opterons are awesome processors, and that mobo you selected (the K8W) is the best of the best. I am endlessly impressed by AMD's design. If only IBM had implemented chip-to-chip interconnects and on-die memory controllers in the G5! :(

[racolvin]

Ok, one of you hardware (power and cooling) geniuses tell me this: if G5's in PowerBooks is too hot, is it outside the realm of possibility that a 17" Powerbook could go Dual G4? Like Dual 1.25's or 1.4's? Even if that isn't a G5, a dual processor notebook would be sweet and dual G4's wouldn't be all _that_ bad would it?

Just curious :)

[Phil Of Mac]

Dual G4's are worse than single G5's.

And I'm sure the G5 was a transitional design that will not last long. G6 by summer? I'll believe it.

[stingerman]

Originally posted by wrylachlan
This seems fishy in that its kind of underwhelming. Not the overall speed increase, but the spec scores per clock. If the 980 is based on the Power5 then there should be a more significant per clock increase in spec scores as the Power5 is a significant increase on the Power4 which the 970 is based on. And the original article implies that the 980 is using the Power5 as a base just working in parallel development instead of waiting for the Power5 to be finished...

They are basing it on the synthetic tests that exclude compiler optimizations. So all things being equal it is a slightly better than linear increase, which is awesome, and a rarity. Frequency is only one variable of the performance formula. Other areas such as the caches, the number of registers, the transistor switch time, the accuracy of the prediction circuitry, the relative distance between internal parts and of course power management all need to be factored in. A linear increase in speed means that all the other variables have improved as well at the same fast rate. That is just an engineering marvel. Go check Pentium benchmarks and see for yourself.

As far as spec marks that include the compiler optimizations, get ready for them in January when the new IBM GCC compatible optimizing compiler is released. (How's that for another rumor, though this one has been kind of confirmed by the Cinebench folks at Maxon.)

[ddtlm]

stingerman:

They are basing it on the synthetic tests that exclude compiler optimizations.
SPEC is very compiler dependent. Intel has been accused of writing compilers in order to get high SPEC scores.

Frequency is only one variable of the performance formula.
Yeah, but getting super-linear scaling is still pretty unusual. (I think this rumor of full of poo.)

Other areas such as ... the transistor switch time ... need to be factored in.
Transistor switch times means nothing without a clock speed to match. Transistors in a syncronous device (which all current processors are) all wait for the clock signal before they do anything, doesn't matter how soon they were waiting for the clock, they still have to wait.

That is just an engineering marvel.
Calm down, this is a RUMOR. One that appears very false, at that.

[Analog Kid]

Originally posted by ddtlm
This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months. Intel has been on their 130 nm P4 for just about 2 years, and they have a far far larger number and value of processor sales than IBM. It is very reasonable to assume that the winter G5 refresh will be using exactly the same 130nm PPC970's as are used now, just clocked higher. Even the summer revision might use them, although 3ghz seems pretty fast. When IBM finally does get a 90nm replacement out the door, there's no reason that it has to be related to the Power5. It could be, but it sure would be a lot more cost effective for IBM to slap more L2 on a 970 and call it good for another year, or more.

I hate to break it to everyone, but in the real world, processors do not undergo radical changes very quickly. It just costs to darn much.


A little wary of interfering with your tirade here, but I think this is a plausible move...

You're right that they can't do this ever year, but they can do it once, and now seems like the right time.

The 970 shipped long after the Power4. It was an afterthought-- probably for the blade market. Apple was an after-afterthought, which is why the Altivec is hacked in the way it is.

Now suddenly these stripped versions of the Power series look like a really lucrative idea. By designing them concurrently, you can optimize for both designs and it saves you some cash through efficiency.

My guess is we'll see the Altivec more integral this time as well. Wanting to get the power savings of the Power5 into the lineup (both IBMs and Apples) as quickly as possible is also a marketing requirement too, I'm sure.

In the end, they save half a design cycle on the 980, but it's a one time gain. After that the chips come out at a normal rate again. Maybe they haven't maximized their profit on the 970, but it's a one time loss with the hope of growing revenue by advancing on the technology curve.

[Analog Kid]

Originally posted by racolvin
Ok, one of you hardware (power and cooling) geniuses tell me this: if G5's in PowerBooks is too hot, is it outside the realm of possibility that a 17" Powerbook could go Dual G4? Like Dual 1.25's or 1.4's? Even if that isn't a G5, a dual processor notebook would be sweet and dual G4's wouldn't be all _that_ bad would it?

Just curious :)

Yeah it's possible if that dual core G4 ever shows up out of Mot. This would be significantly lower power than two independent chips.

It would actually be pretty kickin' all the way around. I think I'd actually chose a 2G4 over a G5 in a powerbook...

Whenever I start to get excited though, I remember that Mot would have to actually produce something...

It looks like some folks are still clinging to the "clock down a G5" idea, but I think it's pretty clear by now that it isn't enough. I wouldn't expect PBG5s before late summer early fall.

[ffakr]

Originally posted by ddtlm
This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months. Intel has been on their 130 nm P4 for just about 2 years,
Actually, the northwood P4s (.13 micron) were apparently released around January of 2002. That's nearly 2 years now, but the .18 micron P4 was introduced a year and a half before that. Intel was ready to release .09 at least a quarter ago, but they've been pushing back due to 'issues'.
It is very reasonable to assume that the winter G5 refresh will be using exactly the same 130nm PPC970's as are used now, just clocked higher.
IBM will release .09 micron processors when the process is ready. A move from .13 to .09 microns takes more than just shrinking everything... the entire layout of the chip needs to be tweeked, but it is an easier task than a ground up design. .09 micron will add R&D cost to the chip, but it will also increase the number of processor per 300mm wafer and increased performance will drive demand up. There are market forces and yield efficiencies that make up for the quick introduction of more R&D to the chip so soon.
I hate to break it to everyone, but in the real world, processors do not undergo radical changes very quickly. It just costs to darn much.
Again, this depends on other forces. If IBM is moving production lines to .09 micron (because the process is mature), they will make .09 micron PPCs. They won't keep one line held back on purpose. Also, if they have .09 production lines up, and .13 production lines up, why would they not make processors on both if demand required it? .13 micron chips would fill different speed niches and different product lines while .09 micron would be more efficient to produce, perform better, and command better prices.

PC's and Macs use the same memory technology, if this thing they talk of is a real effect (I think its an error, but who knows) then its gona effect Macs too.
...
If only IBM had implemented chip-to-chip interconnects and on-die memory controllers in the G5! :(
yea, if only the 970 had on die memory controllers, the Dual G5 could require one memory bank per processor like dual opterons. I think this might be what the poster was talking about in reference to Opteron memory issues.
The on die memory controllers are nice, especially in single processor machines. They lower the latency of memory access which helps the Opteron perform so wel... but there are advantages to having a central memory controller and one big bank of RAM. :-)

[ffakr]

Originally posted by TMay
In my case, I found that the Tyan dual opteron board can be found for around $500, and (2 ea) 244 Opteron (1.8 Ghz) for about $460 each. Then you need power supply, graphics card, case, drives, memory, etc. Pretty pricey for a build your own system, and I would be surprised if it can be built for much less than a 2Ghz Dual G5. Kind of an eye opener!

you can always build stuff yourself cheaper (aside from when Dell gives away base configs hoping you load on extras).

In your case, if you used quality parts you still look at (to match a base dual G5 config)
[estimates, some high, some low]
$150 case/power
$150 radeon 9600 Pro
$150 SATA 160 GB drive
$200 4x DVD-R
$500 motherboard
$460 cpu
$460 cpu
$ 20 internal modem
$120 two 256MB DDR 400 [crucial]
$ 45 mouse/keyboard
total:
$2255

Now figure,..
does it have on board GigE
does it have on board Firewire?
does it have digital audio built in with spdif optical out?
Do you need to purchase additional case fans?

I don't know which Tyan board you found, it may or may not have these included.

What OS do you use? Do you pay for M$? Do you get a licensed DVD player? iApps (or something as good)?

How much is your time worth? How long does it take to find the parts, order them all, assemble the box, install the OS and all the software? How do you handle warranty repairs for OEM parts? Who do you deal with, manufacturers or vendors?

And finally.. the intangibles. You don't get to run OS X or the very nice iApps. You don't get the 'integrated experience' of a well built mac. Is all the hardware as nice as what Apple is selling? [love or hate the case design, it's a nice freaking case from a technical design point]

even the home built dual opte isn't all that cheaper, especially if you used licensed software.

then again...
I just ordered a dual G5 through the developer site. $2216 after I removed the modem and downgraded to a combo drive. :-)
(and Microsoft and the BSA will never kick my door down looking for a bootleg copy of iCal)

[rog]

I'll get a G5 when I can get a DP 3 GHz for the price of my DP 867 which is now even faster than when I bought it a year ago. Hopefully Apple won't intentionally cripple the lineup like they usually do, as with the no L3 Powerbooks, 256kb L2 iBooks, and the lame, slow, overpriced, SP G5s they currently sell. A 256Kb L2 is great, for 1995! Actually, I had a 1MB L2 in my 7500 back in 1997. The current lineup just doesn't cut it, aside from the DP 2 GHz. If we have DP 2.8 G5s by March or so, that will be great news!

[wizard]

This si good news in one sense but really not that surprising. It has long been rumored that IBM can hit even higher frequencies with the current process. So an up rated 970 on 90nm process should not be surprising at all. Also note that they did not say that the 980's where Power 5 based, I suspect they are just a die shrink with minor improvements to cashe and maybe Alt-vec/Velocity Engine/whatever. Well doubling the cache would not be minor but niether is it really state of the art, a 4x cache increase would relly be something to talk about.

I'm in the unfortunate position of not being able to afford a G5 at the moment, it is nice to know that when I can afford one they will most likel be running much closer to 3GHz than they are today.

I don't doubt this rumor one bit, though the details may be off a bit, as frankly Apple has no choice but to take big steps. The G5 will be trailing big time, in the area of raw CPU performance, by the time January hits. What we are likely to see in January is an 970+ running at 2.5 to 3GHz. This 970+ would likely have the expanded cahce as the article hints at, plus other minor improvements. My suspicion is that Steve want to hit 3GHz in January as by that time Intel will be close to 4GHz. The actual Power 5 derived chip will appear in mid 2004.

thanks
Dave


Originally posted by Macrumors
An unconfirmed report spelling out some interesting future possibilities about Apple and their PowerPC progress and development:

"Following the microprocessor forum, IBM presented Apple with a handful of PPC 980 alpha samples to begin work on the next generation Powermac due out in 9-12 months. Initial compiler tests showed specfp base 2000 of 1400 and specint of 1200 at 3Ghz. The PPC 980 will have double the L2 cache of the 970, and will still not have an L3 cache option, owing to the fact that the 980 will have a 1x, 2x, 3x, and 4x bus multiplier, which will allow an FSB to run at the chip clock speed if need be, but the plans are to stick to a 2x multiplier, which would mean a 1.5Ghz FSB. The reason why the 980 is appearing only 12 -16 months after the 970 is that Apple chose to engage in parallel development with the Power 5, rather than wait 12-18 months after the fact. The 980 samples that were given to Apple were 90nm chips, as opposed to 130nm chips for the PPC 970 and the Power 5.

For the G5, the next revision is well under way. The bugs on IBM's 90nm process have been squashed, and ramp up will begin within 6 weeks, with intention of having enough chips ready for the next revision G5's due in February. 2.5 - 2.8 Ghz is probably going to be the ceiling of the new revision Powermac G5's based on test yields obtained recently. If everything goes well, 2Ghz may drop out of the equation entirely, and 2.2 Ghz may become the low end, a jump of 500-600 Mhz this revision is realistic, and should be expected. As for the Powerbook G5, only a general timeline is given with a range from April 2004-September 2004 is given, the only obstacle being finding an appropriate cooling technology."

[ffakr]

Originally posted by rog
and the lame, slow, overpriced, SP G5s they currently sell. A 256Kb L2 is great, for 1995! Actually, I had a 1MB L2 in my 7500 back in 1997. The current lineup just doesn't cut it, aside from the DP 2 GHz. If we have DP 2.8 G5s by March or so, that will be great news!

The lame single processor G5s beat the dual processor G4s in some benchmarks... and the optimization for the G5 is still in its infancy. Look at the performance of single processor Opteron/Athlon64s. They do have the on board memory controller, but the 970 has other architectural advantages over the Opterons. The performance will come.

Also, the 7500 had a PPC 601 processor. The L2 cache (if I recall) was on a separate dimm, it was relatively far from the CPU and dog slow. It also cost a bundle when the 7500s were in production. 7500s didn't even ship with L2, it was an aftermarket option.
Powermac Cache Specs (http://docs.info.apple.com/article.html?artnum=14750)

Today, L2 cache is on-die. The amount of cache has a lot to do with die size, which is related to process size and transistor count. 256K is ok for the last G4. The 7447s are on a smaller process so they maintain a 'good' overall chips size by upping the L2 cache.
Also, cache requirements are affected by other factors. If Motorola was making 2.5 GHz G4s with the same slow bus, then a huge L2 cache would increase performance more than it would on a 1.3 GHz part at the same bus speed.

[wizard]

A couple of things to note here. First the processors will be built in the same plant. Seocnd IBM has had the 90nm process up and running. Third the smaller process could potentially save them and Apple money. Fourth IBM likes to be precieved as leading the world in semiconductor technology. Beating Intel to the punch or at least stay neck and neck with them is very important.

Apple knows that it needs to keep ahead of the curve or atleast stay neck in neck with the Intel cometition or risk back sliding in the minds of the consumers. They will do everything possible to get as close to 3GHz in January as possible. Further; there is a very good possibility that this rev of the 970 may be headed for the Powerbooks first. There is no way anyone could deny the demand for portables, a power effiecent 64 bit portable would give Apple bragging rights for some time to come.

While the specifics of the original post may be mixed up a bit I have no doubt that Apple will be using 90nm chips real soon know. Maybe not in the G5 Tower, but somewhere else like the PowerBooks. In the end economies orf scale would probally drive the 90nm chip into all 970 based Apple products as soon as production permits.

Thanks
Dave


Originally posted by ddtlm
This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months. Intel has been on their 130 nm P4 for just about 2 years, and they have a far far larger number and value of processor sales than IBM. It is very reasonable to assume that the winter G5 refresh will be using exactly the same 130nm PPC970's as are used now, just clocked higher. Even the summer revision might use them, although 3ghz seems pretty fast. When IBM finally does get a 90nm replacement out the door, there's no reason that it has to be related to the Power5. It could be, but it sure would be a lot more cost effective for IBM to slap more L2 on a 970 and call it good for another year, or more.

I hate to break it to everyone, but in the real world, processors do not undergo radical changes very quickly. It just costs to darn much.

TMay:


PC's and Macs use the same memory technology, if this thing they talk of is a real effect (I think its an error, but who knows) then its gona effect Macs too.


Expensive but absolutely kickin. Opterons are awesome processors, and that mobo you selected (the K8W) is the best of the best. I am endlessly impressed by AMD's design. If only IBM had implemented chip-to-chip interconnects and on-die memory controllers in the G5! :(

[ddtlm]

Analog Kid:

A little wary of interfering with your tirade here, but I think this is a plausible move...
Yeah people always think everything is a reasonable move. In the more than two years I've been posting here, its pretty much been one endless train of "plausible" moves that have no grounding in reality.

You're right that they can't do this ever year, but they can do it once, and now seems like the right time.
These things cost a ton, but what's more, people need to do the work, and its just not realistic to expect IBM to all the sudden have the people to roll out three different PPC9xx chips in 12-16 months, along with everything else. I could see a Power5 derivative this summer and no changes this winter, that might fly, but I think its more likely that we'll only get a 90nm PPC970 this summer.

Now suddenly these stripped versions of the Power series look like a really lucrative idea. By designing them concurrently, you can optimize for both designs and it saves you some cash through efficiency.
Some money can be saved, but they are still very different processors. The Power chips are dual core, have no AltiVec, have shared L2's, support for L3's, and as far as I know totally different chip interconnects. This isn't like a Celeron or Duron, where the chips are identical to the expensive version except for some L2.

wizard:

So an up rated 970 on 90nm process should not be surprising at all.
Actually a shrink to 90nm and increase to 1 MB L2 would be the most normal thing for IBM to do. The question is when.

I don't doubt this rumor one bit, though the details may be off a bit, as frankly Apple has no choice but to take big steps.
Apple's "needs" will not effect the scaling of IBM chips any more than they did Moto chips. The real world lies between "we need this to compete" and "this is achievable for a price we can afford".

First the processors will be built in the same plant. Seocnd IBM has had the 90nm process up and running.
IBM's next 750 is 130nm, and not yet released. Their Power5 is 130nm, and probably a year away still.

Third the smaller process could potentially save them and Apple money.
Only if the volumes offset the cost of migration. Its just not clear that a 6-8 month run of chips primarily for Apple can do that. Not even Intel has such short runs and their volumes are way higher.

Fourth IBM likes to be precieved as leading the world in semiconductor technology. Beating Intel to the punch or at least stay neck and neck with them is very important.
Thats a heck of an expensive PR victory, if its possible at all. Why not just spend the few hundred million on conventional ads which will be understood by more than internet geeks?

Apple knows that it needs to keep ahead of the curve or atleast stay neck in neck with the Intel cometition or risk back sliding in the minds of the consumers. They will do everything possible to get as close to 3GHz in January as possible.
This has litte or no bearing on what IBM can or cannot do.

[mvc]

Originally posted by ddtlm
Yeah people always think everything is a reasonable move. In the more than two years I've been posting here, its pretty much been one endless train of "plausible" moves that have no grounding in reality.

Aaahh, the tragedy, soOo jaded after only two years of suffering the slings and arrows of outrageous optimists.

You SOUND like you know what you are talking about, but I really really hope you are dead wrong, on principle!!

;)

[Analog Kid]

Originally posted by ddtlm
Analog Kid:


Yeah people always think everything is a reasonable move. In the more than two years I've been posting here, its pretty much been one endless train of "plausible" moves that have no grounding in reality.


These things cost a ton, but what's more, people need to do the work, and its just not realistic to expect IBM to all the sudden have the people to roll out three different PPC9xx chips in 12-16 months, along with everything else. I could see a Power5 derivative this summer and no changes this winter, that might fly, but I think its more likely that we'll only get a 90nm PPC970 this summer.


Some money can be saved, but they are still very different processors. The Power chips are dual core, have no AltiVec, have shared L2's, support for L3's, and as far as I know totally different chip interconnects. This isn't like a Celeron or Duron, where the chips are identical to the expensive version except for some L2.


Trying to decide what's plausible is kinda the point of rumor-mongoring, don't ya think?

As far as volume are concerned, I think that's only part of the question. It looks to me like IBM entered into the relationship because the Apple volumes help defray the cost of their own servers. If IBM can get Apple to foot some of the cost and they wind up with systems that better compete with HP/Itanic et al, it looks like a win to me.

That's the beauty of the relationship: IBM has it's own personal reasons for wanting to push performance, and Apple makes it much more affordable to do so.

Also, keep in mind how IBM designs their chips-- they don't hand route them like Intel and AMD do. They rely on the tools to do that. They've traded off the extra optimization at each generation for the ability to turn new devices much more quickly and cost effectively.

So, while the Power5 and 980 have their differences, any work done on the core of each benefits the other with much less labor than a P4 vs Celeron comparison would imply...

By the way, have you seen updated information that confirms the Power5 doesn't include Altivec? That was another rumor I've been waiting for confirmation on...

[mproud]

Perhaps the greater question is not how fast we'll see PPC 980s and the such...

...but exactly what the relationship is between Apple and IBM and how much they value each other in bitter reality.


[insert smiley with raising eyebrows]

[Dont Hurt Me]

its a new era, the 80's are long gone.

[wizard]

Originally posted by ddtlm
Analog Kid:


Yeah people always think everything is a reasonable move. In the more than two years I've been posting here, its pretty much been one endless train of "plausible" moves that have no grounding in reality.

Well this is a rumor site, if somebody did have access to restricted information and posted here there would be problems. On the other hand there is enough public information available to indicate that IBM has had success moving to 90nm.



These things cost a ton, but what's more, people need to do the work, and its just not realistic to expect IBM to all the sudden have the people to roll out three different PPC9xx chips in 12-16 months, along with everything else. I could see a Power5 derivative this summer and no changes this winter, that might fly, but I think its more likely that we'll only get a 90nm PPC970 this summer.

There is a fundamental differrence between the way Motorola lays out a chip and the way IBM does. IBM's heavy reliance upon design automation tools means that the 970's move to 90nm could be the result of a simple recompile of the processors source code. It may not be a question of having people available for the transition but a bit of computer time. I hear IBM has a lot of computer time available ;)



Some money can be saved, but they are still very different processors. The Power chips are dual core, have no AltiVec, have shared L2's, support for L3's, and as far as I know totally different chip interconnects. This isn't like a Celeron or Duron, where the chips are identical to the expensive version except for some L2.

This depends upon what you expect in January. If you're expecting a Power 5 derivative then yes it is a profoundly differrent chip. If you expecting a 970+ chip then it isn't such a big deal. Even then we must understand that IBM's developement model offers them significant advantages, dropping or adding features just not that big of a deal.


wizard:


Actually a shrink to 90nm and increase to 1 MB L2 would be the most normal thing for IBM to do. The question is when.

This is what I suspect is coming in January. I could very weel be that the original poster confused an upgraded 970 with a Power 5 based chip. In Apples mind I dont believe it is a question of when, but is a question of as soon as possible. Apple has been hurting for a long time over the reality that the G4 never scaled well, they need to keep what ever little lead they have in performance.



Apple's "needs" will not effect the scaling of IBM chips any more than they did Moto chips. The real world lies between "we need this to compete" and "this is achievable for a price we can afford".

I disagree completely here. The whole design of the 970 was driven by Apples needs. Apple has a need for faster and lower power chips that is where they will drive their supplier. Apples problems with Motorola where vastly differrent, and had very little to do with what was achiveable.



IBM's next 750 is 130nm, and not yet released. Their Power5 is 130nm, and probably a year away still.


Only if the volumes offset the cost of migration. Its just not clear that a 6-8 month run of chips primarily for Apple can do that. Not even Intel has such short runs and their volumes are way higher.

First the plant is already built, not having the plant produce revenue will cost IBM money! Second IBM plants work as chip foundries, it isnot like the 970 is the only thing running on the production lines. The move to 90nm will be driven by Apples performance demands.


Thats a heck of an expensive PR victory, if its possible at all. Why not just spend the few hundred million on conventional ads which will be understood by more than internet geeks?

Well its better than trying to explain to your share holders why your shinny new plant isn't producing anything.



This has litte or no bearing on what IBM can or cannot do.

[Telomar]

Originally posted by ddtlm
If only IBM had implemented chip-to-chip interconnects and on-die memory controllers in the G5! :( You'll be getting your wish soon enough.

Originally posted by ddtlm
Yeah, but getting super-linear scaling is still pretty unusual. (I think this rumor of full of poo.) Actually even without adding any of the improvements from the POWER5 there are quite a few optimisations that can be accomplished simply by restructuring the layout of the cores and using current resources more effectively. In fact in the move to a 90nm process this becomes an area that needs addressing anyway to ensure current leakage is kept to a minimum. Don't be surprised to see a 90nm version of the current core performing even better clock for clock and that's stating nothing about including other potential developments.

Of course that doesn't mean this rumour is true in this time frame just that certain things are possible.

[-hh]

Originally posted by ddtlm
This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months...

I hate to break it to everyone, but in the real world, processors do not undergo radical changes very quickly. It just costs to darn much.

All very true, but this assumes "business as usual" economics, where the way that IBM makes their money is on their per-chip markup of a product in production.

To break that paradigm, all that has to happen is for Apple to guarentee to IBM that they're going to recoup their investment without having to make the full production run until payback.

This could be as simple as "Here's $25M if you shift to 90nm now (or early)".

If you think of production lines as used cars, this is like offering someone $25K over book value for their used car to motivate them to go buy a new car.

Keep in mind that to the best of our knowledge, Apple is currently the sole buyer of this specific chip design variation. As such, the way IBM makes money is by being willing to do whatever Apple is willing to pay for. And we've already seen proof of this in the parallel R&D effort...


-hh

[deputy_doofy]

Originally posted by Phil Of Mac
Dual G4's are worse than single G5's.

And I'm sure the G5 was a transitional design that will not last long. G6 by summer? I'll believe it.

I'm inclined to agree. I don't think of G5s as the next generation. I think G5s are where the G4s SHOULD be right now. However, if Apple called them G4Advance, or some hokey name like that, nobody would give it a second look.

The G6 will be the true next generation chip. Again, this is not a knock on the G5 ('cause I'll be buying one of these babies next year :)), as we all knew that the G4 was a great chip, limited by Motorola's limited imagination and limited front side bus issues.

My 2¢.

[lynnpye]

Originally posted by Phil Of Mac
If this is true, I'm going to kiss Steve Jobs, and then I'm going to kiss the people at IBM, and then I'm going to give the people at Motorola a roundhouse kick to the groin.
I think Motorola already received their shot to the jewels when Apple moved away from them to IBM for most (all?) of their CPU requirements. :eek:

[TMay]

Originally posted by ddtlm

Expensive but absolutely kickin. Opterons are awesome processors, and that mobo you selected (the K8W) is the best of the best. I am endlessly impressed by AMD's design. If only IBM had implemented chip-to-chip interconnects and on-die memory controllers in the G5! :(

While I believe that the Opteron is a fine processor (in the context of x86), the PPC 970 is certainly a more elegant design overall, excepting a few issues (on die memory controller, better Altivec integration, etc) which are known and will be addressed. I have to buy something to run PTC Pro/Engineer, and I'm looking at the dual opteron for number crunching, but I haven't ruled out a cheap Pentium system either.

AMD may live and die by the Athlon64, but I'm solidly behind PPC. PTC is onboard soon with its first package on OSX, Pro/Concept, that I will have in my hands shortly. Will the rest of their mechanical design suite follow? Stay tuned.

[NNO-Stephen]

Originally posted by lynnpye
I think Motorola already received their shot to the jewels when Apple moved away from them to IBM for most (all?) of their CPU requirements. :eek:

Motorola still does the G4s, but they will be out of the picture if IBM can come up with that rumored AltiVec enhanced G3 which Apple could market as a G4 if they wanted although it would be quite different... but still, Motorola is on it's way out the door and I think Apple made that pretty clear with how hard they had been working on the G5.

[macshark]

The first parapgraph of this rumor does not sound very plausable. It is nearly impossible for IBM to have 980 alpha units running at 3GHz right now. Normally, the first few spins of a new processor has many problems and parts do not run anywhere near the speed target.

I also find it very hard to believe that IBM has finished the 980 design already, given that this is a brand new microarchitecture. Even though it may be based on the Power5 core (for which IBM does seem to have internal Beta samples), many differences (AltiVec, external bus, etc.) in 980 will add to the development schedule. It is likely that a very accurate architectural model of the 980 exists at this time, and maybe even a test chip that implemented some portions of the design, e.g. the external bus unit which will be one of the most critical pieces for Apple HW designers. With these tools, Apple should be able to do sufficient development to be ready for the 980 chips when IBM can deliver them.

The second paragraph of the rumor is more credible. 2.2GHz-2.8Ghz sounds like a reasonable target for first 90nm 970 samples, though I think we are more likely to see 2.4 and 2.7GHz parts with 3:1 bus multiplier ratio at first.

Instead of the 980, we may see a modified version of the 970 with larger L2 cache, faster external bus and potentially marginally faster clock speeds (3GHz) before the end of 2004. One of the articles in this thread indicated that IBM has a very automated backend (place & route) flow. It is likely that the first version of the 90nm 970 we are going to see in January is a quick port of the 130nm 970 with minimal changes to the basic layout and logic. It will be much easier for IBM to turn a more "advanced" version of this chip in a short amount of time that is optimized for the 90nm process and includes a few minor architectural improvements.

[PeteyKohut]

Originally posted by 1macker1
Dual Processor Powerbooks!!!!! That's has to be next. The g5 chip isn't coming to the PB anytime soon.

That's what a lot of people said about the G4! They will find a way to cool it down. The .09 micron fab will be cooler than the .13 fab. Perhaps they will wait until they have a low powered .09 micron chip.

[Frobozz]

Originally posted by ddtlm
This rumor claims that IBM will go from a 130nm 970 to a 90nm 970 to a 90nm 980 in about a year, which is absolutely, undeniably, a crock full of ****. They just can't make money throwing away processor designs every 6-8 months. Intel has been on their 130 nm P4 for just about 2 years

I agree that your skepticism is warranted, but I don't agree with your logic. I've taken this particular rumor with a grain of salt, but here are some hard facts that I think this rumor may be based on (or fabricated from?):

1) The only way Apple is getting a 3 GHz chip from IBM, in June, is by moving to the 90nm process. This is clearly stated in IBM's documents that the 970 will not go faster than a top end of 2.5 to 2.8 GHz, and to do that it will need a 90nm process.

2) A 3 GHz processor, according to similar documents, is only slated as a 980.

3) Apple has stated the G5 will reach 3GHz in one year. We assume this to mean June, the annoucement date, and not Sept., the ship date.

4) We know Apple will not rebrand the 980 as a "G6" for various reasons. Notwithstanging is the 980 is commonly referred to as the big brother of the 970. Also, it wouldn't make sense to rebrand the processor jump since it will essentially scale linearly and only be released one year (980) after the first (970).

5) Many sources have stated, including IBM it's self, that the 980 is being produced in parallel with the Power5, and that both are in alpha stage now. Shipment expected in Q2 of next year (June is the last month of Q2).

I put all these indicators together and it reads one thing to me. Granted, I could be wrong, but here it is:


The 3GHz G5 in June of 2004 will be a 980 PPC on a 90nm process.


No, I won't lose sleep if this doesn't happen... but based on the above facts and a little conjecture from public statements by Jobs and IBM at conferences, it looks like it will be true.

The bottom line is that Apple is kicking ass and taking names... and I am happy either way.

[Frobozz]

Originally posted by macshark
The first parapgraph of this rumor does not sound very plausable. It is nearly impossible for IBM to have 980 alpha units running at 3GHz right now. Normally, the first few spins of a new processor has many problems and parts do not run anywhere near the speed target.

The speed ceiling of the 980 is stated at 4 to 4.5 GHz. Initial yields will be from 2.5 to 3.2 Ghz by most accounts. So, yes, given IBM's stellar capabilities thus far it's easy to believe 3 GHz chips are available now. Again, they're ALPHA's. This means they're the first off the line that work relatively reliable. Bugs exist.

[Dont Hurt Me]

Apple didnt invest in all this technology with ibm only to keep using g4's in so many models. you will see a migration of all products to the G5, this may take 2 years.every 6 months a new G5 970 product so when this cycle is complete the 980 will be about showing itself. i guess a 2.5gig 1st of the year 3 gig(970) out for next summer and the current crop of g5's we will see in other products.then the 980.

[macshark]

Originally posted by Frobozz
I agree that your skepticism is warranted, but I don't agree with your logic. I've taken this particular rumor with a grain of salt, but here are some hard facts that I think this rumor may be based on (or fabricated from?):

1) The only way Apple is getting a 3 GHz chip from IBM, in June, is by moving to the 90nm process. This is clearly stated in IBM's documents that the 970 will not go faster than a top end of 2.5 to 2.8 GHz, and to do that it will need a 90nm process.


Similar IBM documents have indicated the maximum clock speed for the 130nm PPC970 to be 1.8GHz. It would not be a big deal for Apple to come up with a 10% surprise on the clock speed of 90nm 970


2) A 3 GHz processor, according to similar documents, is only slated as a 980.

3) Apple has stated the G5 will reach 3GHz in one year. We assume this to mean June, the annoucement date, and not Sept., the ship date.


I am sure Steve will agree that showing a 3GHz demo in June 2004 will qualify as "reaching 3GHz in one year" even if it takes until August or September for the systems to be shipped to customers.


4) We know Apple will not rebrand the 980 as a "G6" for various reasons. Notwithstanging is the 980 is commonly referred to as the big brother of the 970. Also, it wouldn't make sense to rebrand the processor jump since it will essentially scale linearly and only be released one year (980) after the first (970).

5) Many sources have stated, including IBM it's self, that the 980 is being produced in parallel with the Power5, and that both are in alpha stage now. Shipment expected in Q2 of next year (June is the last month of Q2).


Architectural work, which involves a much smaller number of architects and engineers may be going in parallel, but the actual design is very resource intensive, it is more likely that IBM will pipeline these projects over a few large teams instead of setting up a dedicated team for each. Even assuming that Apple can eventually sell a million G5 chips per year, this still does not generate enough income for IBM to be able to fund 3 or 4 complete and parallel CPU design projects.



I put all these indicators together and it reads one thing to me. Granted, I could be wrong, but here it is:


The 3GHz G5 in June of 2004 will be a 980 PPC on a 90nm process.


Not impossible, but highly unlikely. The more likely scenario, as I stated earlier, is 2.4GHz (and potentially 2.7GHz) 90nm PPC970 in January 2004, followed by a 3GHz 90nm PPC970 (potentially with 1MB of L2 cache instead of 512KB) in June 2004.

If we are lucky, we will see a 3GHz+ PPC980 in January 2005, which will still make this the best 18 months of processor upgrades in the history of Apple.




No, I won't lose sleep if this doesn't happen... but based on the above facts and a little conjecture from public statements by Jobs and IBM at conferences, it looks like it will be true.

The bottom line is that Apple is kicking ass and taking names... and I am happy either way.

Same here...

[macshark]

Originally posted by Frobozz
The speed ceiling of the 980 is stated at 4 to 4.5 GHz. Initial yields will be from 2.5 to 3.2 Ghz by most accounts. So, yes, given IBM's stellar capabilities thus far it's easy to believe 3 GHz chips are available now. Again, they're ALPHA's. This means they're the first off the line that work relatively reliable. Bugs exist.

The specualted clock target for 980 is 4 to 4.5GHz, but in 65nm, not 90nm. It is likely that the first (90nm) version of the 980 will run somewhere around 3GHz and an upgrade to 65nm will bring the speed over 4GHz.

90nm manufacturing is giving nightmares to all silicon vendors that are running fabs. Intel is deep trouble, and TSMC is having major problems with their 90nm process. IBM and UMC seem to be doing better, but I can't believe that 90nm manufacturing is a "smooth operation" for IBM at this point.

[ddtlm]

Sheesh, your all so optimistic. ;)

[pgwalsh]

Originally posted by x86isslow
i think if you re-read the article, it says that the next revision of the G5 is different from the 980, so i doubt speeds up to dual 2.8 by feb. I agree. I am thinking 2.5 Ghz... That seems fairly reasonable. 500Mhz speed bump.. I'm wondering if they found an architecture issues and will be revising the motherboards?

It would be great if there was room for 5 serial ATA drives for RAID. Redundancy and Speed.

[pgwalsh]

Originally posted by Phil Of Mac
If this is true, I'm going to kiss Steve Jobs, and then I'm going to kiss the people at IBM, and then I'm going to give the people at Motorola a roundhouse kick to the groin. And then people will either be visiting you at the nutt house or in jail.. :p

[Genie]

What do you think we'll be at in January?

[pgwalsh]

Originally posted by Genie
What do you think we'll be at in January? I think the next release of G5's will be at 2.5 for top end. 2.2 for middle and 1.8 for bottom.. Hopefully all dual processors.

[Genie]

Originally posted by pgwalsh
I think the next release of G5's will be at 2.5 for top end. 2.2 for middle and 1.8 for bottom.. Hopefully all dual processors.

You think this will be ship in February?

[wizard]

While I have no idea at all if the original poster got some information mixed up I do know a few things. First is that Apple and IBM have been using parallel development techniques. Second the 980 if it is being sampled to Apple would almost have to be in the 3GHz range with the expectation that production versions will be even faster. There would otherwise be no reason to intorduce the new chip. I would expect a true Power % derivative chip to arrive sometime after the middle of next year.

What I think the orignal article is alluding to is a 90nm 970 derivative. This would be achip with minor improvements, most likely in the area of cache. It is interesting that some of the material in the article that is claiming new features already exist in the 970 such as the differrent bus multipliers. A 90 nm 970 running with a slower bus would make one hell of a laptop processor. This would be the ultimate slap in intels face - see what we can do with 64 bits in a laptop!

I do have the suspicion that come the new year we will be dazzeled by Apple in a number of ways with a number of new products. We are talking here XServes, IMacs, upgraded G5's, 970 based PowerBooks and a whole bunch of other things that are possilbe.

Dave




Originally posted by macshark
[B]The first parapgraph of this rumor does not sound very plausable. It is nearly impossible for IBM to have 980 alpha units running at 3GHz right now. Normally, the first few spins of a new processor has many problems and parts do not run anywhere near the speed target.
snipped a bunch of stuff.<<<<<<<<<<<[B]

[pgwalsh]

Originally posted by Genie
You think this will be ship in February? I hope it'll ship in the middle of Jan... but right now I know squat. Thought I do know a vp at apple. He wont share anything with me... I've tried for a few years.. Nadda. Not even a hint..

[x86isslow]

with all the initial shipping delays, there was some talk that apple would ship DP 1.8 ghz G5s to take some ppl off of the waitlist for the DP2ghzG5.

If they didnt ship 1.8DP then do you really think they would do so in a few months?

i think that they would ship with the dual 2's as the base, then scale up with dp2.4(mid), dp2.6(high) or so.

mebbe then, the 1.6, and the 1.8 would drift on down to the consumer lines:eek:

[macshark]

Originally posted by Genie
What do you think we'll be at in January?

Here is my best guesses for what will be annoucned in Jan 2004:

PowerMac:
1. 2.4GHz G5 based on 90nm PPC970 with 800MHz bus (90% confidence)
2. 2.7GHz G5 based on 90nm PPC970 with 900MHz bus (60% confidence)
3. 3.0GHz G5 based on 90nm PPC970 with 1GHz bus (30% confidence)

XServe:
1. 2.0GHz G5 based on 90nm PPC970 with 1GHz bus (70% confidence)
2. 2.4GHz G5 based on 90nm PPC970 with 800MHz bus (60% confidence)

[pgwalsh]

Originally posted by x86isslow
with all the initial shipping delays, there was some talk that apple would ship DP 1.8 ghz G5s to take some ppl off of the waitlist for the DP2ghzG5.

If they didnt ship 1.8DP then do you really think they would do so in a few months?

i think that they would ship with the dual 2's as the base, then scale up with dp2.4(mid), dp2.6(high) or so.

mebbe then, the 1.6, and the 1.8 would drift on down to the consumer lines:eek: That makes sense, but there's other logistical reasons for not shipping dual 1.8's. What a hassle...

People waited and I think they were up for waiting a little longer. I do think they should have dual processors on all the pro models. All consumer models should have single processors and I think the top consumer model should contain the same processor as the bottom of the proline.

[deputy_doofy]

Originally posted by macshark
Here is my best guesses for what will be annoucned in Jan 2004:

[b]PowerMac:
1. 2.4GHz G5 based on 90nm PPC970 with 800MHz bus (90% confidence)
2. 2.7GHz G5 based on 90nm PPC970 with 900MHz bus (60% confidence)
3. 3.0GHz G5 based on 90nm PPC970 with 1GHz bus (30% confidence)


Why are the bus speeds so small in your prediction? I thought they were using 1/2 processor speeds for the FSB speeds, which would allude to a 1.2GHz bus for the 2.4 chip, a 1.35GHz bus for the 2.7 chip, and a 1.5GHz bus for the 3.0 chip.

Can someone confirm this?

[Phil Of Mac]

Originally posted by pgwalsh
I hope it'll ship in the middle of Jan... but right now I know squat. Thought I do know a vp at apple. He wont share anything with me... I've tried for a few years.. Nadda. Not even a hint..

That's why they made him VP!

Originally posted by deputy_doofy
Why are the bus speeds so small in your prediction? I thought they were using 1/2 processor speeds for the FSB speeds, which would allude to a 1.2GHz bus for the 2.4 chip, a 1.35GHz bus for the 2.7 chip, and a 1.5GHz bus for the 3.0 chip.

Can someone confirm this?

Indeed, but it's not quite easy to scale up bus speeds at the same rate of processor speeds. We must remember that originally, bus and processor were at a 1:1 ratio.

[x86isslow]

well the snippit from the source says that multipliers are available in 1x, 2x, 4x, etc, that they were using 2x so far, and would likely stick with it.

tho, it would still be possible to have an 8x or wutnot.

[pgwalsh]

Originally posted by Phil Of Mac
That's why they made him VP!
. yeah.. sure..

He's VP of a division not of the entire company...

[Phil Of Mac]

Originally posted by pgwalsh
yeah.. sure..

He's VP of a division not of the entire company...

My point is, they tend to make trustworthy people VP's. Even if they're only VP's of divisions.

[pgwalsh]

Originally posted by Phil Of Mac
My point is, they tend to make trustworthy people VP's. Even if they're only VP's of divisions. And my point was that is not why they made him vp... They made him vp because he good at what he does.. They trusted him enough to hire him..

[Phil Of Mac]

For God's sake. My point was just that Apple keeps their secrets close to the chest, so they don't put people into positions where they know company secrets unless they're trustworthy in the first place. If you want to split hairs, be my guest, but that's not what I'm here for.

[ffakr]

Does anyone realize that everyone has glossed over the fact that, by complete coincidence, IBM generated Integer scores that scale exactly with cpu speed and that scale faster in FP.. but also coincidentally in a whole number fraction increase.

Someone did have the insight to figure this out earlier, but everyone is so gung ho for 980 rumors that they completely ignore this.

This report is totally bogus. It's based on information that we all think we know so we want to believe, but what are the odds that a 50% increase in speed on a new chip would yield a 50% increase in interger performance and a 66% increase in FP? Who ever posted it is laughing their asses off.

Personally I think IBM has 980s in the lab but they are under wraps because: a) Apple wants them under wraps, and b) IBM hasn't even shipped 970 boxes yet. Heck, I wouldn't be at all surprised if Apple had engineering samples of 980s since Apple will likely design the controller (Apple designed the 970 controller after all).

That aside, we have every reason to believe that when IBM does spin off a Power5 knock off it will probably do better than scale with processor speed. The Power 5, after all, supports HT (supposedly much better than Intel's HT). A '980' will probably have a better implementation of Altivec... maybe even Altivec+ with support for DP Floats (that's a guess, but a reasonable one). IBM has said in the past that the Power5 may be 4x as powerful as the Power4+...
There are lots of reason to expect even more than a linear scale of computing power.

my 2 cents.
ffakr.

[stingerman]

Hey kids, isn't this exciting. Well anyway to shoot down some trolls here:

1. The 970 already does have 3 processor to processor interconnects. They are coherent interconnects to allow the 970's to form a 8-way SMP system. And, like the Opteron, the processor share each others L2 caches if they are available. So in this case the design of the Opteron and the G5's are similar.

2. I doubt the 980's will have on-board memory controllers. But if they do all the better, however it isn't that important for the G5's. Why? Because the flexible bus (bus slewing) more than makes up for the additional latency. The processor at 3GHz will have a 1.5GHz FSB with RAM still peaking between 800 and 1000 Mhz. If you build the memory controller on the processor than every time AMD wants to use the latest faster memory they have to redesign the processor portion to handle it and do a new run, instead of just changing the south bridge. So there are trade-offs to either approach, but the latency issue is not a factor now and will be less so as the FSB continues to increase. For AMD it is more of a one-up on Intel.

3. IBM Germany has achieved 2.8GHz on the 970 back in February 2003 in the labs.. Hello.

4. The current G5's though advertised at 2GHz, can actually peak at 2.2 GHz. Apple only needs to change a software configurable parameter. Anyone know Forth out there? Apple is still refining the bus slewing before they implement dynamic over-clocking as part of bus slewing.

5. The 980 was in development in parallel with the 970. IBM was completing work on the Power5 (980 core) at about the time they announced the 970; they announced their work on a 970 at 90nm at the same time. They invested 3 Billion dollars on the Fishkill plant for a business that is dominated by Intel for a reason. Expect a very fast roll-out cycle and a move to 90NM sooner then later. With wafers the size of a large pie of Pizza, IBM can get tremendous efficiencies to be price competitive with Intel and AMD.

6. IBM already fit a dual Opteron system into a 1U Server. It's a big deal. But let me tell you a secret: The G5 at 130nm generates less heat than the Opteron. So let your imagination on what areas Apple can put a 90nm G5, besides up the b*tt of these Wintel trolls. LOL.

[wizard]

Very nice summation stingerman.

I'm personally having trouble understanding why people don't think apple will push as hard as possible for a large performance increase someitme in early 2004. Frankly if they want to continue to claim top performance each time a G5 is updated they will need atleast 500MHz more with just the current 970 implementation. The possibility of a 970+ giving us a little extra is all the better.

Maybe the non believers will take another look at the world outside of Apple. AMD will certainly be outperforming the current G5's by January in the vast majority of the areas where it matters. Apple needs and wants to maintain the perception of being the leader in performance, pulling out the stops to get it isa given.

Thanks
Dave



Originally posted by stingerman
Hey kids, isn't this exciting. Well anyway to shoot down some trolls here:

1. The 970 already does have 3 processor to processor interconnects. They are coherent interconnects to allow the 970's to form a 8-way SMP system. And, like the Opteron, the processor share each others L2 caches if they are available. So in this case the design of the Opteron and the G5's are similar.

2. I doubt the 980's will have on-board memory controllers. But if they do all the better, however it isn't that important for the G5's. Why? Because the flexible bus (bus slewing) more than makes up for the additional latency. The processor at 3GHz will have a 1.5GHz FSB with RAM still peaking between 800 and 1000 Mhz. If you build the memory controller on the processor than every time AMD wants to use the latest faster memory they have to redesign the processor portion to handle it and do a new run, instead of just changing the south bridge. So there are trade-offs to either approach, but the latency issue is not a factor now and will be less so as the FSB continues to increase. For AMD it is more of a one-up on Intel.

3. IBM Germany has achieved 2.8GHz on the 970 back in February 2003 in the labs.. Hello.

4. The current G5's though advertised at 2GHz, can actually peak at 2.2 GHz. Apple only needs to change a software configurable parameter. Anyone know Forth out there? Apple is still refining the bus slewing before they implement dynamic over-clocking as part of bus slewing.

5. The 980 was in development in parallel with the 970. IBM was completing work on the Power5 (980 core) at about the time they announced the 970; they announced their work on a 970 at 90nm at the same time. They invested 3 Billion dollars on the Fishkill plant for a business that is dominated by Intel for a reason. Expect a very fast roll-out cycle and a move to 90NM sooner then later. With wafers the size of a large pie of Pizza, IBM can get tremendous efficiencies to be price competitive with Intel and AMD.

6. IBM already fit a dual Opteron system into a 1U Server. It's a big deal. But let me tell you a secret: The G5 at 130nm generates less heat than the Opteron. So let your imagination on what areas Apple can put a 90nm G5, besides up the b*tt of these Wintel trolls. LOL.

[legion]

To throw more fuel on the fire, but IBM is planning to announce a four-way 970 low-end server in December. Would IBM want Apple to announce 1 month later a product with faster chips?

On top of that, IBM"s semiconductor production division is losing money. Apple is still too small a customer and they really need higher quantity orders. IBM would rather increase quantity on their current production than scrapping current machinery (which leads to IBM developing more uses for the 970)

[Telomar]

Originally posted by legion
To throw more fuel on the fire, but IBM is planning to announce a four-way 970 low-end server in December. Would IBM want Apple to announce 1 month later a product with faster chips?

On top of that, IBM"s semiconductor production division is losing money. Apple is still too small a customer and they really need higher quantity orders. IBM would rather increase quantity on their current production than scrapping current machinery (which leads to IBM developing more uses for the 970) Server speeds will quite frequently be below what you'd see in the desktop market.

Apple would be one of IBM's better revenue streams. IBM also produce a lot more products than the 970 but it is a high margin product that they can also use for their own needs. There are benefits for IBM to move the 970 to a 90 nm process since they already have the process running for some products.

[loneAzdgari]

Originally posted by 1macker1
Dual Processor Powerbooks!!!!! That's has to be next. The g5 chip isn't coming to the PB anytime soon.

I seriously doubt that, my 1.25GHz Powerbook practically burns me as it is. Two processors would set the table alight!

[jettredmont]

Originally posted by deputy_doofy
Why are the bus speeds so small in your prediction? I thought they were using 1/2 processor speeds for the FSB speeds, which would allude to a 1.2GHz bus for the 2.4 chip, a 1.35GHz bus for the 2.7 chip, and a 1.5GHz bus for the 3.0 chip.

Can someone confirm this?

The FSB/CPU multiplier on the 970 is design-level changable (meaning, if you have a 2:1 CPU it can't be anything else, but flip a switch on the assembly line and you're producing 3:1 CPU's instead).

It is VERY rare to be able to scale your FSB at the same rate as the CPU speed. This is why Intel has a complex (x:y instead of x:1) multiplier. In essence, the simple FSB multiplier in the G5, as I'd pointed out in May or June (before the actual release in any case) means that the next revision may well have an FSB that is slower than the current release. That is, unless the CPU speeds take a 50% leap to 3.0GHz OR Apple pulls off a miracle and can get their SC chips to handle a 1.5GHz-ish FSB speed. The latter isn't completely out of the question (the SC design appears to allow for each component to have a different bus speed as required), but would be quite a design and marketing coup.

So, I agree with the above predictions: most likely we'll see a 3:1 CPU:FSB ratio on the next release. It would be nice if we could see 2:1 remain for a while, though.

[jettredmont]

Originally posted by ffakr
That aside, we have every reason to believe that when IBM does spin off a Power5 knock off it will probably do better than scale with processor speed. The Power 5, after all, supports HT (supposedly much better than Intel's HT). A '980' will probably have a better implementation of Altivec... maybe even Altivec+ with support for DP Floats (that's a guess, but a reasonable one). IBM has said in the past that the Power5 may be 4x as powerful as the Power4+...
There are lots of reason to expect even more than a linear scale of computing power.

my 2 cents.
ffakr.

Note that the SPEC scores explicitly do NOT benefit from hyperthreading, as they are single-threaded. This is also why they do not take advantage of multiple CPUs. Also, key to the Power5 vs Power4 4x advantage is the size of the L2 cache, IIRC, which will definitely be different on the 980.

That having been said, I do agree that I wouldn't be surprised by a super-linear performance boost (even in SPEC) going from 970 to 980. Just not quite as extravagent as the "4x" reports would lead you to beleive.

[.a]

ohhh ... i am so ready for a new power mac! and an g5 imac, too!

i'll get an new power mac g5 this spring for sure.
and if there is a new g5 imac coming, i'll get one for private use, too.

i think the future is bright in the apple world!

now, now i want itms europe asap!!!
.a

[macshark]

Originally posted by deputy_doofy
Why are the bus speeds so small in your prediction? I thought they were using 1/2 processor speeds for the FSB speeds, which would allude to a 1.2GHz bus for the 2.4 chip, a 1.35GHz bus for the 2.7 chip, and a 1.5GHz bus for the 3.0 chip.

Can someone confirm this?

The bus speeds, in the short term, are likely to be limited by the Apple's system controller chip, which is a 130nm ASIC. Even though the 90nm PPC970 will be able to support bus speeds beyond 1GHz, the first generation of 90nm G5 systems are likely to be limited to 1GHz bus because of Apple's 130nm system controller. I am sure Apple will eventually move the system controller to 90nm to improve performance, cost, power consumption, etc. but this is probably not a high priority item on the agenda right now.

One thing that could prove my bus speed predictions wrong is if IBM adds a 5:2 bus clock multiplier to the 90nm PPC970. In this case, it would be possible to have a 2.5GHz G5 system with a 1GHz bus or a 2.25GHz system with a 900MHz bus. If IBM can pull this off, we may even see a 2.75GHz (1.1GHz bus) or 3GHz (1.2GHz bus) G5 on the high end at a very high price point. This may be strategically important as Intel is planning to upgrade the external bus speed on their next gen platforms to 1.066GHz in the first half of next year.

[whooleytoo]

Originally posted by Phil Of Mac
My point was just that Apple keeps their secrets close to the chest, so they don't put people into positions where they know company secrets unless they're trustworthy in the first place.

Actually, that's not really true. ;)

A LOT of people within Apple know company secrets, such as the next generation machine specs and OS features. They have to be built, and they have to be tested so there's no way of preventing a lot of people from finding out - regardless of how trustworthy they are.

The only things that can really be kept secret are the finished look 'n' feel (until someone at the external manufacturers leaks!), prices and exact release dates, and projects like the iPod which don't require as much testing.

[ddtlm]

stingerman:

The 970 already does have 3 processor to processor interconnects.
Eh? Since when? Last I heard, everything including cache coherency info travelled on the FSB, and there was no other link. Why don't you provide a source for your claim?

I doubt the 980's will have on-board memory controllers. But if they do all the better, however it isn't that important for the G5's. Why? Because the flexible bus (bus slewing) more than makes up for the additional latency. The processor at 3GHz will have a 1.5GHz FSB with RAM still peaking between 800 and 1000 Mhz. If you build the memory controller on the processor than every time AMD wants to use the latest faster memory they have to redesign the processor portion to handle it and do a new run, instead of just changing the south bridge. So there are trade-offs to either approach, but the latency issue is not a factor now and will be less so as the FSB continues to increase. For AMD it is more of a one-up on Intel.
You are very much wrong. No FSB-based system can ever compete with an on-die memory controller of similar bandwidth, doesn't matter how fast the FSB is clocked. Signals have been travelling as fast as possible more-or-less forever, and so the limiting factor is how far the signals have to travel, and with on-die memory controllers that distance is far shorter, so the data is returned much faster. FSB systems can compete in streaming applications, where data is flowing in predictable ways, but as soon as data needs to come from random places in RAM, then all that matters is how fast it can be accessed. Increasing the clock of the RAM and the FSB will do little or nothing to address this.

IBM Germany has achieved 2.8GHz on the 970 back in February 2003 in the labs.. Hello.
Based on a rumor, or is did IBM officially claim this?

The 980 was in development in parallel with the 970.
A rumor, or is it guesswork?

But let me tell you a secret: The G5 at 130nm generates less heat than the Opteron. So let your imagination on what areas Apple can put a 90nm G5, besides up the b*tt of these Wintel trolls. LOL.
Prove it. And don't give me IBM's "typical" power use figures, find me the peak power use numbers. Then do the same for AMD.

wizard:

Very nice summation stingerman.
Looks to me like all he did was dish out ignorance. But what wonderful pro-Mac ignorance it was. ;)

Maybe the non believers will take another look at the world outside of Apple.
Do yourself a favor and try not to describe your relation with Macs in the same words as one would use for a cult.

[-hh]

Originally posted by macshark
Here is my best guesses for what will be annoucned in Jan 2004:

PowerMac:
1. 2.4GHz G5 based on 90nm PPC970 with 800MHz bus (90% confidence)...

XServe:
1. 2.0GHz G5 based on 90nm PPC970 with 1GHz bus (70% confidence)...

Given Apple's past performance in let-downs, I'm really very tempted to say that January will bring nothing. :D

But I'm not quite that cynical at the moment, and my crystal ball's saying that come January, we should get at least the following:

PowerMac:
1. Drops the oddball 1.6GHz's motherboard
2. Product line goes to DP.
3. Minimum Speed: existing 1.8 (but is now DP)
4. Medium: existing 2.0 DP
5. Fast: at least 2.2 DP
6. All chips stay on 130nm process;
7. Overall this is pretty much just a "speedbump" upgrade.
There might be another +200MHz for all of these; depends on your degree of optimizm.

XServe:
1. Of course its gets updated.
2. Two models: SP 1.8GHz and DP "Top Speed" of PowerMac
3. Also stays on 130nm.

iMac:
- Refresh is due & rumored. Will be concurrent with G5 Transition.
- Recipient of the slower 130nm PowerMac chips no longer being used in the PowerMac, thus is probably:
- 1.6 GHz SP G5 for the 15"
- 1.8GHz SP G5 for the 17"

Powerbook:
- probably no changes. If there is a change, it will be to a low-clockspeed 90nm G5 (~1.8GHz) in the 17".


iBook:
- just went to the G4; no changes.

eMac:
- Apple can't afford to get rid of "the cheap Mac".
- Just speedbumped; expect more of same


-Hugh

[ffakr]

Originally posted by ddtlm

Based on a rumor, or is did IBM officially claim this?

he's referring to an IBM Germany press release this past spring where they pre-announced a PPC 970 based blade server. I seem to recall the number they announced was 2.4 or 2.6GHz. IBM never commented on this apparent leak but it remained up for nearly a week before IBM took it down.
It did, however, appear to be an official IBM release.
A rumor, or is it guesswork?

I'm also under the impression that the processors are under parallel developement. IBM pretty much said this flat out at WWDC when they said they were already working on the next generation of this family.
It's also very common to work on multiple generations at once. Intel, IBM, AMD, Sun.. they all work this way. Why do you think chip designers make projected claims about processors that aren't due until 3 years down the line? Intel is talking up Tanglewood like crazy but it won't debut till 2005 or 2006.

Prove it. And don't give me IBM's "typical" power use figures, find me the peak power use numbers. Then do the same for AMD.

IBM and AMD don't use the same criteria to rate their processors so it's difficult to make direct comparisons.
The Athlon XP, at least, has typical power consumptions VERY close to max... as shown here (http://www.lostcircuits.com/cpu/xp_2200/3.shtml)
If this were true of the Opteron (which it may not be), then Typical would likely come in around 80watts.. MUCH higher than the PPC 970's ~50watts at 2GHz. If I find some better figures on typical Opteron waste heat, I'll save the link.

Looks to me like all he did was dish out ignorance. But what wonderful pro-Mac ignorance it was. ;)


I think he had some valid points, he just didn't support them well.

[ffakr]

Originally posted by Telomar
Server speeds will quite frequently be below what you'd see in the desktop market.

Well, there are a few reasons for this...
1) Server chips are often different than desktop chips. They try to sort for reliability (they may actually make them differently, thicker gates). In the case of Intel, the Xeons sport new features first (HT), and they are available with much larger L2 caches (and on die L3 in some cases)
2) Servers don't always need cutting edge performance. many server tasks are MUCH MORE bandwidth dependent (internal and external) then they are cpu dependent. Often server don't need to be as fast per CPU, they can make up for it with large SMP configs. For fileserving, a single G4 xserve will run out of Disk bandwidth long before the processor becomes overtaxed.
3) People expect to pay more for servers so vendors can get away with charging more for server versions of chips (at the same clock point). This probably helps slide the release shedule for new chip speeds as the price points can be filled with slower chips
...
yadda, yadda, and yet more yadda.

:-)

[Genie]

Glad to see the forums are back up!

[Phil Of Mac]

Originally posted by Genie
Glad to see the forums are back up!

Yeah, I wonder what happened there.

[Genie]

Originally posted by Phil Of Mac
Yeah, I wonder what happened there.

Maybe they were on a Firewire drive...LOL

[silvergunuk]

Seeing as were all making wild guesses for what we expect at macworld in January, I might aswell do mine :) Hooray!

G5 Towers go to
Dual 2.5 GHZ G5
Dual 2.2 GHZ G5
Dual 2 GHZ G5

Imacs Goto
1.6 GHZ G5 17 inch
1.8 GHZ G5 (get this lol) 19 Incher!

PowerBooks
1.6 GHZ for 12/15.4
1.8 GHZ for 15.4/17

Xserve now changed to Xgrid with 4 2.5 GHZ 970 (yeah took me ages to think this 1 up ;) )

...ok now you can reply to my wild off the wall guesses with 90 nm problems, efficiancy, time frame and the like. Need hot tea!

[Genie]

Originally posted by silvergunuk
Seeing as were all making wild guesses for what we expect at macworld in January, I might aswell do mine :) Hooray!

G5 Towers go to
Dual 2.5 GHZ G5
Dual 2.2 GHZ G5
Dual 2 GHZ G5


I guess:
Dual 2.4 GHZ G5
Dual 2 GHZ G5
Single 2 GHZ G5

[Phil Of Mac]

Steve Jobs should shave for MWSF.

That's really my only concern.

[ddtlm]

ffakr:

He's referring to an IBM Germany press release this past spring where they pre-announced a PPC 970 based blade server. I seem to recall the number they announced was 2.4 or 2.6GHz. IBM never commented on this apparent leak but it remained up for nearly a week before IBM took it down.
This is not the same thing as having the product ready to go.

I'm also under the impression that the processors are under parallel developement. IBM pretty much said this flat out at WWDC when they said they were already working on the next generation of this family. It's also very common to work on multiple generations at once. Intel, IBM, AMD, Sun.. they all work this way. Why do you think chip designers make projected claims about processors that aren't due until 3 years down the line? Intel is talking up Tanglewood like crazy but it won't debut till 2005 or 2006.
The next generation they speak of could easily be a 970 designed for 90nm, or it could be a "980" that's still more than a year off. Heck, it could be both. They simply don't say.

IBM and AMD don't use the same criteria to rate their processors so it's difficult to make direct comparisons.
AMD tends to tell everyone the worst case heat output, IBM tends to tell people "typical" outputs and keep the worst case a secret between them and companies like Apple. If IBM were straight forward about this there would be no mystery. All they need to do is provide a worst-case heat output.

The Athlon XP, at least, has typical power consumptions VERY close to max
The A64/Opteron use a different process tech, one likely much more compeditive with IBM's.

If this were true of the Opteron (which it may not be), then Typical would likely come in around 80watts.. MUCH higher than the PPC 970's ~50watts at 2GHz. If I find some better figures on typical Opteron waste heat, I'll save the link.
Ah hah, there you've fallen into the trap. That 50W is definately not a worst-case figure, its in fact close to the "typical" number for a 1.8ghz G5. Approx 80W is a worst-case AMD provides for the Opteron family, although they don't say which clockspeeds are capable of generating it. It may well be that no Opteron can generate 80W at this time. (Actually it would be worth checking on that again, maybe they've provided more details since.) The point is, noone (who is talking) knows if a G5 or an Opteron produces less heat. I'm betting they are pretty compeditive, but I don't know either.

[Phil Of Mac]

"We have already built the prototypes for next-generation PowerPC microprocessors."

IBM rep in the Power Macintosh G5 introduction video.

[ddtlm]

Phil Of Mac:

What does that do to refute what I have been saying? The next generation of chip isn't necessarily a "980", heck maybe they were talking about the Power5 itself, or as I've already said, nothing more than a 90nm PPC970 (which maybe they'll call a 980).

To refresh your memory, the original comment to which I objected was:

"The 980 was in development in parallel with the 970."

[Phil Of Mac]

I wasn't trying to refute anyone, I was providing information.

[ddtlm]

Phil Of Mac:

Oh, then please excuse my itchy trigger finger. :)

[aswitcher]

Does anyone think Apple will ever go bigger than 17" with their powerbooks to try and lead the market again?

Is there a market for 18"+ laptops?

Jason

[ffakr]

Originally posted by ddtlm
Phil Of Mac:

What does that do to refute what I have been saying? The next generation of chip isn't necessarily a "980", heck maybe they were talking about the Power5 itself, or as I've already said, nothing more than a 90nm PPC970 (which maybe they'll call a 980).

To refresh your memory, the original comment to which I objected was:

"The 980 was in development in parallel with the 970."

I think you're desperately trying to argue that IBM isn't working on a 980 right now. Here's the facts that we understand...

1) ALL chip makers work on multiple generations of chips at once. Sun is working on US4, US5,.. IBM is working on Power5, Power6... Intel is working on Prescott, Tejas, Yamhill?? and they are working on several generations of Itanium. This doesn't mean that Intel has Tanglewood silicon but they are working on it already. It would be impossible to generate a forward looking roadmap without parallel but staggared development.
2) IBM has said they are working on the next generation of PowerPC. Do you REALLY think that the next generation is the same chip with a die shrink? Come on. Has Apple ever called a shrunk chip a new generation? Motorola and IBM have made significant changes to past PPC chips and they haven't called them different generations of Power PC processors... just revisions.
3) IBM has said, many times, that they will be supporting the PowerPC for Apple for years to come. Even without saying there is a 980 working, promising several years of development ensures new processors and new processors means they will be developing them in parallel.
4) Even if IBM chooses to simply split off a 'lite' version of the Powers instead of evolving the 9x0 line, then as they are working on several generations of Power processors (which they are), they are also making considerations for the 'lite' processors.

The A64/Opteron use a different process tech, one likely much more compeditive with IBM's.
...
Ah hah, there you've fallen into the trap. That 50W is definately not a worst-case figure, its in fact close to the "typical" number for a 1.8ghz G5. Approx 80W is a worst-case AMD provides for the Opteron family, although they don't say which clockspeeds are capable of generating it. It may well be that no Opteron can generate 80W at this time. (Actually it would be worth checking on that again, maybe they've provided more details since.) The point is, noone (who is talking) knows if a G5 or an Opteron produces less heat. I'm betting they are pretty compeditive, but I don't know either.
first off, why is the A64 process so different than previous Athlons? Architecture wise, Athlon64 is an extension of the Athlon. Process wise, the Athlon is made on a .13 micron copper process just like Athlon 64. Athlon64 uses SOI which Athlon doesn't. SOI does lower heat, but I don't know what affect it has on the difference between typical and max output.

Now, what trap did I fall into?
I NEVER said the ~50 watts for a 970 was max. I simply stated that the link I posted indicated that the typical wattage for an Athlon was very close to the Max wattage. If typical an max were generally close on processors like the Opteron too (which is similar), then you'd expect the typical wattage of the Opteron would be nearly 80 watts.
But wait, I've done better... A list of Opteron max and typical wattage. Link to wattage (http://www11.brinkster.com/bayup/doarticles.asp?d=p&a=59)
Go figure, apparently the typical wattage for the Opteron is in fact around 80 watts if this person has their facts correct.

Looks like I know an Opteron produces more heat than a G5... and I'm talking. :-)

[ffakr]

Originally posted by aswitcher
Does anyone think Apple will ever go bigger than 17" with their powerbooks to try and lead the market again?

Is there a market for 18"+ laptops?

Jason
Most people I know (me included) think the 17" is too big. It's really a desktop replacement, but it's kind of unwieldly to carry around.
I'd like one only because I don't walk around with a laptop case, I use my iBook on the couch. For all around use though, I'd prefer a 15" laptop. Lighter, cheaper, big enough... and I can hook a monitor bigger than 17" up to it if I really want.

jmho.
ffakr.

[Jagga]

I got some statements - although I could be wrong, and some ideas.

First off with the info listing FSB multipliers up to 4x was hinting on what WASN't mentioned. ddtlm touched on it ->hyperconnects for multiprocessors on mobos. Its no secret IBM not only got $$ but experience in lending their experience in helping AMD fabricate SOI Athlon64's. We also know that AMD holds most of the research & development rights to HyperTransport, hence their ability to incorporate memory controllers on-die and hyperinterconnects for CPU & memory controllers to run at parallel speeds to one another. (1600Mhz FSB people).

I hope that the new G5s in Feb PowerMacs have gone up to 2.5Ghz along with 2MB of L2 cache. Also I think that we might see a PowerBook G5 by October 2004 - my statement - because if AMD can have a system built using dual Opteron 244s with less than 6 fans @ 130nm fabrication its because they don't generate much heat because of the Hyperinterconnects.

Also Apple may delay the Xserve so that they can goto 4 G5s internally to better appeal to the server crowd (think Xgrids success with supercomputer PowerMacs). At 90nm I believe this will be feasible along with single 1.8Ghz PowerBook G5s @ 90nm fabs hopefully the later with 1MB L2 cache.

Furthermore Apple may release a 25th Anniversary Mac! I expect no less than SATA HD, OLED screen - stunning, LOTS of DDR RAM, AirExtreme, maybe an imbedded dock for iPod, maybe 3D glasses, all in an ultra sexy silver star clothing. Something fitting for Batman to use once again.

[ffakr]

You make a few shaky assertions here.
Originally posted by Jagga
We also know that AMD holds most of the research & development rights to HyperTransport, hence their ability to incorporate memory controllers on-die and hyperinterconnects for CPU & memory controllers to run at parallel speeds to one another. (1600Mhz FSB people).
AMD is one member of the Hypertransport consortium. They don't own Hypertransport or even most of it.
Hypertransport isn't required for on die memory controllers.
I'm pretty sure the AMD FSB is not 1600 MHz. Could you post a source for this?

I hope that the new G5s in Feb PowerMacs have gone up to 2.5Ghz along with 2MB of L2 cache. Also I think that we might see a PowerBook G5 by October 2004 - my statement - because if AMD can have a system built using dual Opteron 244s with less than 6 fans @ 130nm fabrication its because they don't generate much heat because of the Hyperinterconnects.
I don't think the next 970 will have 2MB cache... it'd be too big for a small server/desktop processor (that is physically too big).
You can build an opteron or a dual G5 with 1 fan if you wanted to. the number of fans have nothing to do with heat. Granted that one fan would be big and fast and it'd have to move a lot of air.
G5 have lots of fans, but they barely turn. This has been beat to death already.
Hypertransport [hyperinterconnects??] don't produce less heat than other protocols on other AISCs running at the same clock.

Also Apple may delay the Xserve so that they can goto 4 G5s internally to better appeal to the server crowd (think Xgrids success with supercomputer PowerMacs).
The whole idea behind Grid computing is clustering computers on a loose grid. if you make super fast nodes, you decrease the need for a grid.
As with any 'cluster'.. beowolf, grid... faster nodes are better. But, you very well might be better off with 3- dual processor boxes on the grid rather than one quad proc box (or some multiple of those... 30 dual vs. 10 quads). It all depends on what you're doing.
Rest assured, I'd love to see a quad proc mac, but it'd cost a lot.

[jonapete2001]

The athlon 64 fx and athlon 64 3200 both have system bus of 1.6 ghz.

AMD web site is the source.


AMD 64 system bus (http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_9485_9487^9492,00.html)

[Telomar]

Originally posted by jonapete2001
The athlon 64 and athlon 64 both have system bus of 1.6 ghz. It's a 32 bit interconnect though so it requires the higher speed.

[Genie]

Originally posted by Telomar
It's a 32 bit interconnect though so it requires the higher speed.

Wow- they only have a 32 bit bus and we have a 64?

Apple is cool!

[Phil Of Mac]

Mac vs. PC arguments have never been better.

"Well, WE have a 64-bit BUS!"

[legion]

Originally posted by ffakr

I don't think the next 970 will have 2MB cache... it'd be too big for a small server/desktop processor (that is physically too big).

Ummm... next Pentium M chip from Intel (Dothan) has a 2MB L2 cache on a 90nm process. Obviously, it's predominately meant for laptops.;)

[ddtlm]

ffakr:

I think you're desperately trying to argue that IBM isn't working on a 980 right now.
Well there's certainly no desperation involved. My position is that noone knows what IBM is working on besides "next generation PPC", which could be anything from 90nm 970's to referring to the Power5. If IBM shrinks the 970 to 90nm and uses much of the Power5 for the "980", there is no reason that they would have had to done anything 980-specific when the 130nm 970 was being developed (the original claim), or really even by now. I think everyone here is blowing IBM's development schedule way out of proportion... the 130nm Power5 not coming out till late 2004 at the earliest, I'd be very surprised if a "980" was available before that, especially at a different feature size (than the Power5). I'm still thinking a very realistic and achievable schedule would be to have 90nm PPC970's for the summer of '04, and replace them the summer of '05 or the following winter, depending on how well they scale and how well their replacement is coming along. But who knows...

ALL chip makers work on multiple generations of chips at once.
Of course they are, but derivative chips aren't being worked on separately as far ahead of time. To use your example of Sun, they probably weren't developing the US4 when the US3 was pre-release... cause they are based on the same core. The same argument could me made for the so-called 980.

IBM has said they are working on the next generation of PowerPC. Do you REALLY think that the next generation is the same chip with a die shrink?
I think that they were probably reffering to the Power5, but a 90nm 970 would technically count.

Has Apple ever called a shrunk chip a new generation? Motorola and IBM have made significant changes to past PPC chips and they haven't called them different generations of Power PC processors... just revisions.
Its all marketing driven. Just because upgraded G4's weren't hailed as revolutionary doesn't mean upgraded G5's won't be. It was certainly in Apple's favor to talk about "next generation" PPC's after the G5, regardless of what they were. They needed to speak boldly. What is "next generation" now might be treated as no big deal when they roll it out; perhaps they got their value out of calling it "next generation" and reassuring the customers.

Even if IBM chooses to simply split off a 'lite' version of the Powers instead of evolving the 9x0 line, then as they are working on several generations of Power processors (which they are), they are also making considerations for the 'lite' processors.
This is not the same thing as designing the derivitive processors.

First off, why is the A64 process so different than previous Athlons?
SOI, as you said. Should cut a lot of heat out, and the other features that add performance per clock cycle seem to help the performance/heat ratio a lot.

Now, what trap did I fall into?
You started comparing typical figures to max figures and concluded the G5 uses less power. You see, that is simply not provable with the available information. (But I'll write about the speculation a bit latter.)

I NEVER said the ~50 watts for a 970 was max. I simply stated that the link I posted indicated that the typical wattage for an Athlon was very close to the Max wattage. If typical an max were generally close on processors like the Opteron too (which is similar), then you'd expect the typical wattage of the Opteron would be nearly 80 watts.
I dunno about claims that an Athlon "typical" is similar to max, because of course typical isn't defined. Is typical idle, or running a certain application? Does IBM define it the same way? Does Moto define it the same way? Your link listing Opteron thermal power illustrates exactly what I said was true: AMD only lists one max output for the whole Opteron family. So all we know is that all current and same-family future Opterons use <= 80.6W in a worst case. As far as I know, all we know about G5's is that they "typically" generate 47W at 1.8ghz, and 18W (I think) at 1.2ghz.

You can look at "typical" vs max thermal powers for Athlons and speculate that a similar relationship exists for G5s, and then speculate that current Opterons have a max near 80W. If I make these assumptions, and also assume that a 2.0ghz G5 runs the same voltage as a 1.8ghz G5, we'd still have a 2.0ghz G5 dissipating a max of 57W. Assuming that AMD's 2.0ghz Opteron uses all 80.6W allowed by their spec, a G5 is still using about 71% the power of an Opteron. But the Opteron could easily be using less and the G5 could easily be using more. AMD's 80.6W figure applies to the whole Opteron family, and who knows how fast AMD has planned on that scaling. 80.6W might be for a 2.4ghz Opteron. Assuming that's running the same voltage as a 2.0ghz model, the 2.0ghz model is already pushed down to 67W. Note that this is not an unreasonably low figure either, an Athlon on 180nm running at 1.8ghz uses a max of 68W based on the lostcircuits link you provided. Adding SIO and going to 130nm ought to offset the 200mhz higher clock and increased transistor count without worry.

But back to my assumptions about non-increaseing voltages. Unfortuneately, its not very likely that voltage is going to remain constant for either the G5's or the Opterons. (Your lostcircuits link nicely shows Athlon voltages changeing with clockspeed.) That 10W gap could dissapear really easily, I dunno how much you know about voltage, but in case you didn't know it already, voltage is a huge deal... its why a 1.2ghz G5 uses only 38% the power of the 1.8ghz model. It would be easy to account for 10W between voltage differences from both directions. The Opteron might even end up using less power.

But hey, this is all speculation. Maybe all Opterons use 80.6W all the time (as difficult to explain as that would be), maybe the max power of a G5 is 53W at 2ghz. I don't know what the real numbers are, and I don't think you do either.

(In other news, I think I just spent too much time writing that! ;) )

Jagga:

I hope that the new G5s in Feb PowerMacs have gone up to 2.5Ghz along with 2MB of L2 cache.
Well I guess we'll never know till it happens, but since IBM went with 512k the first time around I'm betting they will remain very conservative and choose 1024k on the 90nm PPC9xx versions.

legion:

Yeah, Intel has been going a bit nutso with caches recently, haven't they? The P-M's, the P4 EE, the Itaniums... I guess they can fab it and make money though. They have nice fabs, even if some of their processors are looking poor compared to their competion. :)

[Analog Kid]

Originally posted by Telomar
It's a 32 bit interconnect though so it requires the higher speed.

The G5 bus is 32bit as well-- two unidirectional 32 bit busses. This was done to cut the turnaround time and simplify the system controller. It doesn't do much to increase the actual bandwidth.

[Analog Kid]

Originally posted by ddtlm
stingerman:
You are very much wrong. No FSB-based system can ever compete with an on-die memory controller of similar bandwidth, doesn't matter how fast the FSB is clocked. Signals have been travelling as fast as possible more-or-less forever, and so the limiting factor is how far the signals have to travel, and with on-die memory controllers that distance is far shorter, so the data is returned much faster. FSB systems can compete in streaming applications, where data is flowing in predictable ways, but as soon as data needs to come from random places in RAM, then all that matters is how fast it can be accessed. Increasing the clock of the RAM and the FSB will do little or nothing to address this.

For random accesses, any latency is going to be dominated by RAM access times-- where the memory controller is sitting won't make much of a difference. RAM latencies are an order of magnitude greater than the delay through a couple pipe stages with a GHz clock.

The advantages of the on-chip memory controller are power and cost. You don't need a second chip to talk to your RAM and you don't have those GHz signals driving high-capacitance board traces.

That's one of the reasons I think an onboard mem controller would help powerbook integration...

Out of curiosity-- how do dual AMD cpu systems share memory? Are they hijacking the other CPUs memory controller?

[Genie]

Originally posted by Analog Kid
The G5 bus is 32bit as well-- two unidirectional 32 bit busses. This was done to cut the turnaround time and simplify the system controller. It doesn't do much to increase the actual bandwidth.

You mean we, just like those on the dark side, have only a measly 32 bit bus?

Or we have a 64 bit bus that's divided into two parts?

[ffakr]

Originally by ddtlm
Well there's certainly no desperation involved. My position is that noone knows what IBM is working on besides "next generation PPC", which could be anything from 90nm 970's to referring to the Power5. The Power 5 is NOT a PowerPC. If IBM says it's working on the next generation of the PowerPC, it is NOT referring to the Power5.
If IBM shrinks the 970 to 90nm and uses much of the Power5 for the "980", there is no reason that they would have had to done anything 980-specific when the 130nm 970 was being developed (the original claim), or really even by now.
The 970 is a 'spin off' of the Power4 BUT, it is more than just a cut down version. Power4's, to the best of my knowledge, does NOT support HT links. Power4 does not support Altivec. It would be foolish of IBM to not build upon the 970 when they were working another 'lite' version of the Power5.
Peter Sandon, the chief architect of the 970 has already admitted they are looking into revising Altivec in future revisions. This is just one more clue that there are future PPCs in development.

the 130nm Power5 not coming out till late 2004 at the earliest, I'd be very surprised if a "980" was available before that, especially at a different feature size (than the Power5). I'm still thinking a very realistic and achievable schedule would be to have 90nm PPC970's for the summer of '04, and replace them the summer of '05 It's entirely possible that there will be .09 micron 970s next summer. This is really what I think also. That doesn't mean that IBM isn't working on the next generation of the PPC. And I'm not talking about a die shrunk 970, I'm talking about the next major revision of the PPC architecture.

Of course they are, but derivative chips aren't being worked on separately as far ahead of time. To use your example of Sun, they probably weren't developing the US4 when the US3 was pre-release... cause they are based on the same core.I'm fairly certain the US 4 was being worked on when along with the US 3. The fact that one processor is based off the other doesn't prove that they can't be designed in parallel. US 4 will likely be dual core. It probably isn't feasable to make dual core US 3's on todays processes, but that doesn't mean that Sun doesn't say "this is what we are trying to accomplish for the US 3, but keep in mind that US 4 is gonna be 2 of these cores and lets work on these revisions and refinements too"

I think that they were probably reffering to the Power5, but a 90nm 970 would technically count.
Why would IBM talk up Power5 processor development when talking about Macs? Do you really, I mean honestly think that IBM reps would talk about the development of the Power5 at WWDC, or in interviews about the 970 in the Macintosh? Don't you think that when an IBM rep steps on the stage at WWDC and says 'we have a fantastic road map for you', they mean the roadmap for future PowerPCs and not the roadmap for future Power processors, which they might spin off a 'lite' hack version?

Its all marketing driven. Just because upgraded G4's weren't hailed as revolutionary doesn't mean upgraded G5's won't be.
Yes, the term 'generation' is somewhat a marketing tool, but it's also a description of a processor that is essentially new (though based off previous work). The Power5 is a new generation of Power processor over the Power4. The 604e (though it had an additional FPU and other changes) was essentially just another 604. The revisions of the G4 were just incremental revisions of the G4 architecture. They weren't what anyone would call new generations of the PowerPC processor line. What I mentioned before was, Apple, IBM, and Motorola don't have a history of calling something as trivial as a die shrink a new generation. It's never happened before and if you assume that's what they mean now, you'd have to accept that IBM and Apple are treating this processor differently than any other PowerPC processor.
SOI, as you said. Should cut a lot of heat out, and the other features that add performance per clock cycle seem to help the performance/heat ratio a lot.
But SOI, as I stated, doesn't nescessarily change the typical to max thermal ratio. I don't know if it would, I don't know if it wouldn't. I would imagine that the architecture of the processor would have more to do with this.

You started comparing typical figures to max figures and concluded the G5 uses less power.

No I didn't. I compared typical 970 wattage, to typical Athlon wattage, which was very close to max Athlon wattage. I made a direct claim that typical for the 970 is less than typical for the Athlon.
I made the assertion that it is ENTIRELY POSSIBLE that the Athlon 64 would similarly have a similar typical/max wattage since it's a bulked up Athlon. I later came back with a link to stats that indicate that Athlon64 does indeed seem to have typical wattages that are very close to Max wattage. so that point is kind of moot now isn't it.
I dunno about claims that an Athlon "typical" is similar to max, because of course typical isn't defined. Is typical idle, or running a certain application? Does IBM define it the same way? Does Moto define it the same way? don't you think that engineers in the same industry would tend to describe microprocessors in the same basic way? There is no reason to quote chip characteristics if they aren't based on some type of standard definition. I'd have to think that Typical wattage isn't based of an idle cpu. What is so "typical" about a computer that isn't allowed to process something?
Your link listing Opteron thermal power illustrates exactly what I said was true: AMD only lists one max output for the whole Opteron family. So all we know is that all current and same-family future Opterons use <= 80.6W in a worst case. As far as I know, all we know about G5's is that they "typically" generate 47W at 1.8ghz, and 18W (I think) at 1.2ghz.

Intel also quotes large blocks of CPUs at the same wattage. This isn't uncommon. This is because the chips are the same size, on the same process, and they all run at the same core voltage and amperage. Wattage is a calculated by these features. When you calculate wattage you don't factor the frequency into the equation.
If you look a the different wattages for the 970s, they coincide with different core voltages too. The 19watt 1.2 GHz part noted in last years presentation (by Peter Sandon at MPF) was a 1.1v part while the 47watt 1.8GHz part was running 1.3v.

You can look at "typical" vs max thermal powers for Athlons and speculate that a similar relationship exists for G5s,...<snip>. But the Opteron could easily be using less and the G5 could easily be using more.
but I don't have to assume the G5s max when I've already posted Typical figures for the Opteron, which indicated that the current Opterons had Typical wattages of 80.6 watts. So, I've presented Typical wattage for the Opteron, and typical wattage for the PowerPC 970 yet you say that they could easily be more or less than the published figures??

AMD's 80.6W figure applies to the whole Opteron family, and who knows how fast AMD has planned on that scaling. 80.6W might be for a 2.4ghz Opteron.
Interesting. You really think that AMD would say, 'here are the technical details of our processors, but they aren't accurate because we are ACTUALLY giving you the wattage figures from a processor that hasn't been announced yet. I have to agree with you, that's what I'd expect AMD to do also.
Assuming that's running the same voltage as a 2.0ghz model, the 2.0ghz model is already pushed down to 67W. Note that this is not an unreasonably low figure either, an Athlon on 180nm running at 1.8ghz uses a max of 68W
First off, when I provide you with a source indicating a typical wattage of 80.6, how do you assume 67watts? Where is the leap there?
Secondly... you are comparing the wattage of a .18 micron Athlon with a .13 micron Athlong 64 which is OVER 100MILLION TRANSISTORS? The Athlong 64 is MUCH larger than an Athlong. Talk about a leap.

But back to my assumptions about non-increaseing voltages. Unfortuneately, its not very likely that voltage is going to remain constant for either the G5's or the Opterons. (Your lostcircuits link nicely shows Athlon voltages changeing with clockspeed.) That 10W gap could dissapear really easily,..<snip>... The Opteron might even end up using less power.

I'm lost again.
You are arguing with the assertion that todays 970s use less power than todays opterons and your argument now is that future Opterons and 970s will likely require higher voltages on the same process and this will make a difference some day? Huh?

But hey, this is all speculation. Maybe all Opterons use 80.6W all the time (as difficult to explain as that would be), maybe the max power of a G5 is 53W at 2ghz. I don't know what the real numbers are, and I don't think you do either.
I don't happen to design chips for IBM and AMD. That doesn't prevent us from using the data available to make reasonable assumptions. It is NOT unreasonable to assume that 970s are cooler chips than Opterons when the 970 is roughtly HALF the transistor count of the Opteron, the 970 operates at a lower core voltage, the 970 operates in roughly the same frequency range, the 970 is built on essentially the same process.

It would be extremely unlikely that the 970 would not run cooler than the Opteron given these facts (and yes those are facts and not assumptions). :-)

[ffakr]

Originally posted by ddtlm

Yeah, Intel has been going a bit nutso with caches recently, haven't they? The P-M's, the P4 EE, the Itaniums... I guess they can fab it and make money though. They have nice fabs, even if some of their processors are looking poor compared to their competion. :)
Intel's cache sizes aren't hard to explain.
1) P-M is small, it's low power (cache generally doesn't add to heat as much as logic), and it's designed to run more efficiently per clock than the P4. There is a rough die size that is considered optimal for adding interconnects and for heat/density. When you make a P-M you want to say in the same optimal size window, and you can do that by adding cache. It also allows Intel to run the chip slower, at lower voltages, creating less heat, at higher computational efficiency.
2) P4 EE isn't really a P4. It is a Xeon that is being introduced as a P4 Only because the Athlon64 family is creaming the P4 in gaming benchmarks. This isn't a new chip, just an existing processor that has been rebranded.
3) Itaniums are server chips. Server chips generally have more cache because they need it. Money is also less of an issue with a server processor so designers have the luxury of using more cache. The last PA-RISC had 32 MB of cache if I recall correctly.
As for the Itanium.. it's a VLIW processor so it's designed to process multiple words at once. It also has quite a bit of bandwidth so it probably needs way more cache to keep it from getting data starved.

cheers
ffakr

(had to post seperately, last one was too big ;-) )

[Phil Of Mac]

"We have already built the prototypes of next-generation PowerPC processors."

[Genie]

Originally posted by Phil Of Mac
"We have already built the prototypes of next-generation PowerPC processors."

Sounds like we're talking about 980- based design?

[manitoubalck]

I think the "Typical figures" of processor wattage is rubbish, because typical is abartary. typical for a gamer is alot higher than typical for an office worker, So in my opinion IBM and MOTO should release max wattage values.

[ddtlm]

ffakr:

Quite the discussion, I must say.

The Power 5 is NOT a PowerPC. If IBM says it's working on the next generation of the PowerPC, it is NOT referring to the Power5.
Well technically no, but since much of the Power5 will probably turn up in a Power5-lite, to me it seems reasonable for them to make the claim even if the Power5-lite was not yet its own project. (Or I still think they could have been talking about a 90nm 970).

It would be foolish of IBM to not build upon the 970 when they were working another 'lite' version of the Power5.
If IBM builds a Power5-lite from the Power4-lite and not from the Power5, then I think they've lost the economic advantage of it being a Power5-lite. But yes, if this is what they are doing then I would agree that the 980 would have been in development for some time now.

I'm fairly certain the US 4 was being worked on when along with the US 3. The fact that one processor is based off the other doesn't prove that they can't be designed in parallel. US 4 will likely be dual core.
It's a fact that the US4 will be two US3 cores with small tweaks. (Not that that's a real important point, but just to share that info.)

It probably isn't feasable to make dual core US 3's on todays processes, but that doesn't mean that Sun doesn't say "this is what we are trying to accomplish for the US 3, but keep in mind that US 4 is gonna be 2 of these cores and lets work on these revisions and refinements too"
Yeah and I'm sure IBM was thinking similarly for the Power5-lite, but I don't think that this means the lite or US4 was in development in paralell with it's parent.

The revisions of the G4 were just incremental revisions of the G4 architecture.
Well, I sort of agree, except for the jump to the 7450. That was a totally new design, but Apple chose to not mention that at all. The 7450 was probably as different from the 7410 (I think thats the number) as the Power5-lite will be from the PPC970. I'm just thinking this is all very much based on PR and marketing, and that we shouldn't read too much into "next generation" and what it means. I do think that they could have meant the Power5, or a 90nm PPC970 when they said "next generation", but maybe they didn't mean either. I don't see how we can settle that point...

I made the assertion that it is ENTIRELY POSSIBLE that the Athlon 64 would similarly have a similar typical/max wattage since it's a bulked up Athlon. I later came back with a link to stats that indicate that Athlon64 does indeed seem to have typical wattages that are very close to Max wattage. so that point is kind of moot now isn't it.
Its hardly moot, in fact the link wasn't nearly as useful as you're thinking. Just go right to AMD:

http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_8796_739%5E9003,00.html

Grab the "processor data sheet" and go to page 75, where its all made clear. Your link was wrong, AMD lists several thermal power figures for Opterons in general and none are labeled "typical". The "Typ" column is empty. The max thermal power for all Opterons, even those not yet released, is either 80.6W or 84.7W, depending on which figure you take. (This pick-and-choose situation obviously complicates things.)

There is no reason to quote chip characteristics if they aren't based on some type of standard definition. I'd have to think that Typical wattage isn't based of an idle cpu. What is so "typical" about a computer that isn't allowed to process something?
You cannot prove these things by trying to apply logic to the workings of large companies.

Intel also quotes large blocks of CPUs at the same wattage.
Yes in particular the P-M is listed this way, because it will throttle to make sure it stays within the limits. But this is a new phenomenon, as far as I've seen.

When you calculate wattage you don't factor the frequency into the equation.
Transistors use power when they switch, and therefore power usage is effected by clockspeed. The common formula is power usage scales the some constant times clockspeed times voltage squared. Amperage is the effect, not the cause.

Interesting. You really think that AMD would say, 'here are the technical details of our processors, but they aren't accurate because we are ACTUALLY giving you the wattage figures from a processor that hasn't been announced yet. I have to agree with you, that's what I'd expect AMD to do also.
Well actually releasing the max power for the whole family right up front makes designing cases, heatinks and motherboards that a future-compatible very easy.

First off, when I provide you with a source indicating a typical wattage of 80.6, how do you assume 67watts? Where is the leap there?
Well assuming that AMD allowed headroom for 2.4ghz and assuming voltage is constant from 2.0ghz to 2.4ghz, we can just scale the power usage by clockspeed and the 2.0ghz model would have to use about 67W.

Secondly... you are comparing the wattage of a .18 micron Athlon with a .13 micron Athlong 64 which is OVER 100MILLION TRANSISTORS? The Athlon 64 is MUCH larger than an Athlong. Talk about a leap.
Heh, I think youve made bigger leaps. ;)

You are arguing with the assertion that todays 970s use less power than todays opterons and your argument now is that future Opterons and 970s will likely require higher voltages on the same process and this will make a difference some day?
No no, I guess I didn't word things well. I'm saying that because a 2.4ghz Opteron would almost certainly use a higher voltage than a 2.0ghz model that the 2.0ghz model would be pushed down somewhere below 67W due to the effect that voltage has on power use. So the Opteron is pushing down from above, but the 2.0ghz G5 possibly (probably?) uses higher voltage than than 1.8ghz model, its gona be pushing up from below. With only 10W difference before these voltage effects, the gap could close entirely. I've made a series of assumptions to show a reasonable case in which a G5 could be using as much power or more power than an Opteron at the same clockspeed. Its based on a lot of speculation, but this is all stuff that could be true.

I don't happen to design chips for IBM and AMD. That doesn't prevent us from using the data available to make reasonable assumptions. It is NOT unreasonable to assume that 970s are cooler chips than Opterons when the 970 is roughtly HALF the transistor count of the Opteron, the 970 operates at a lower core voltage, the 970 operates in roughly the same frequency range, the 970 is built on essentially the same process.
Ah now those are some more valid points, dare I say. As far as die size and transistor count, AMD is badly effected by the larger L2 (which is not very dense, for some reason). Caches aren't big heat makers so things aren't as dire for AMD as they might at first appear. Voltage levels also do look to be in IBM's favor. So it may well be that G5's use less power than Opterons, but there is too much design-to-design variability to really nail that down. The Power4 core might be one heck of a power pig, I dunno.

[Analog Kid]

Originally posted by ffakr
Intel's cache sizes aren't hard to explain.
1) P-M is small, it's low power (cache generally doesn't add to heat as much as logic), and it's designed to run more efficiently per clock than the P4. There is a rough die size that is considered optimal for adding interconnects and for heat/density. When you make a P-M you want to say in the same optimal size window, and you can do that by adding cache. It also allows Intel to run the chip slower, at lower voltages, creating less heat, at higher computational efficiency.


Actually, cache adds at least as much heat as logic. It also leaks like a sieve at small processes, which is why Prescott is so hot for it's clock speed even at 90nm.

It generates less heat than going to the external memory though, which is why a mobile processor might rely on larger cache.

[Analog Kid]

Originally posted by Genie
You mean we, just like those on the dark side, have only a measly 32 bit bus?

Or we have a 64 bit bus that's divided into two parts?

It's not quite as easy as that... It's a 32bit bus because it eats data in 32bit chunks.

There's two of them-- one can only read and one can only write.

Technicallly, the CPU could read and write simultaneously meaning you're getting a little more than twice the throughput that you would with a single 32bit bus alternately reading and writing (more because it doesn't need to worry about turn around time).

In an extreme case (like a checksum, maybe) where a lot of data goes in and very little comes out, you're not getting much advantage over a standard 32bit bus.

Usually you'll be somewhere in between, I imagine.

I'm sure the folk designing this looked at the 64 signals they had for a bus and decided this was a better solution, so it must have advantages over a true 64 bit bus-- especially for a chip expected to be mostly running 32bit code.

[Genie]

THank you- that was very helpful!

When do you think we'll be seeing a bi-directional true 64 bit buss? (double the pipe size of the current sual 32bit bus).:)

[mvc]

ffakr, ddtim, are you both vying for the longest post ever recorded or something?

If you keep quoting each other back and forth like this, we are going to cross some sort of info event horizon and the whole forum will implode up its own watusi.

Brevity is the soul of wit.

[Telomar]

First on the topic of the actual successor to the current PPC970 rather than a die shrunk version it is already in the works and has been for some time. I know that for a certainty. Expect to see some feature creep come in with the die shrink though.

Now onto the rest.

Originally posted by Analog Kid
The G5 bus is 32bit as well-- two unidirectional 32 bit busses. This was done to cut the turnaround time and simplify the system controller. It doesn't do much to increase the actual bandwidth. If you want to be fussy then the Opteron's bus is actually dual uni-directional 16 bit buses operating at 1.6 GHz.

Originally posted by Analog Kid
For random accesses, any latency is going to be dominated by RAM access times-- where the memory controller is sitting won't make much of a difference. RAM latencies are an order of magnitude greater than the delay through a couple pipe stages with a GHz clock.

The advantages of the on-chip memory controller are power and cost. You don't need a second chip to talk to your RAM and you don't have those GHz signals driving high-capacitance board traces.

That's one of the reasons I think an onboard mem controller would help powerbook integration...

Out of curiosity-- how do dual AMD cpu systems share memory? Are they hijacking the other CPUs memory controller? Memory latencies are significantly lower using an on-die memory controller. On-die memory controllers are also generally more efficient. For instance the memory latency out of the Athlon FX-51 is about 150 clock cycles compared to 250 for a PIV. The bandwidth is also normally as much as 10 - 15% higher despite having the same theoretical numbers.

As for lowering the cost that's certainly debatable. It does move the cost from the motherboard manufacturer to the CPU manufacturer and it does make integration little easier though.

The Opterons use a hypertransport ring that connects multiple CPUs that each connect to their RAM. It then apportions what goes to what RAM based on usages and dataset size, etc. That's done mainly by the OS though.

Originally posted by Analog Kid
Actually, cache adds at least as much heat as logic. It also leaks like a sieve at small processes, which is why Prescott is so hot for it's clock speed even at 90nm.

It generates less heat than going to the external memory though, which is why a mobile processor might rely on larger cache. You answered why you'd want more cache in the first part of your post. Cache leaks heat badly because it's so dense. The more often you need to change what's in the cache the more switches you have. Increase cache size and you decrease switches. Better cache accessing algorithms and utilisation help somewhat too but that's more done in software.

Originally posted by Genie
When do you think we'll be seeing a bi-directional true 64 bit bus? (double the pipe size of the current sual 32bit bus).:) The bitness of the bus is nigh on irrelevant except in terms of the bandwidth available to the bus. The POWER5 uses 2 128 bit buses but that's simply because it needs the extra bandwidth. Even dual channel DDR RAM can't feed the current bus so I wouldn't expect them to bother with the cost of 2 64 bit buses anytime soon.

[Analog Kid]

Originally posted by Genie
THank you- that was very helpful!

When do you think we'll be seeing a bi-directional true 64 bit buss? (double the pipe size of the current sual 32bit bus).:)

I don't know that we ever will-- they may find the current structure to be more efficient. I'm sure IBM/Apple are profiling bus transactions to make sure of that.

Don't worry about bit width-- worry about throughput. Wider busses are very hard to run fast because all of the signals need to be very carefully controlled to all arrive at the same time. That's why a serial bus like FireWire (or SATA) can outpace the much wider ATA busses.

Reality check:
Who said Athlon64 had a 64bit bus at 1.6GHz? Just started going through the datasheet and I see no such thing... I see a 64bit DRAM bus going at 200MHz (presumably 400MHz data rate) and a 16bit HT bus at 1.6GHz...

[Analog Kid]

Originally posted by Telomar
Memory latencies are significantly lower using an on-die memory controller. On-die memory controllers are also generally more efficient. For instance the memory latency out of the Athlon FX-51 is about 150 clock cycles compared to 250 for a PIV. The bandwidth is also normally as much as 10 - 15% higher despite having the same theoretical numbers.


I'm not going to say the integrated memory controller won't cut latency a little, but 100 clocks faster? Does PIV==P4? Are you accounting for the fact that the Athlon is running a 2GHz clock and P4 a 3GHz clock? I'm confused... :confused:

The ram itself has a 40ns (80 G5 core clock) latency or so on a random access. I would expect that to swamp the delays through the system controller. I could account for maybe 12-16 core clocks of additional delay, but I'm only guessing.

Where are the delays added?

10% on sustained throughput would tend to support my guess of added delay, since you have to precharge the next bank once you exceed the burst length-- essentially another random access...

[Henriok]

ddtlm and ffakr:

Power5 is NOT a PowerPCActually it is, and so was Power4 and Power3 before it. They all have the full PowerPC ISA, both 32- and 64-bit instructions, in addiion to the POWER ISA and Amazon ISA (used for OS/400).

IBM constructed the 970 family with 90 nm in mind, so there won't be any trouble in the transistion to 90 nm. They have publicly stated that They'll start at 130 and move as quickly as they can to 90 nm.

There are some empty space on the 970 die that look suspicion. I figure it will be fileld with cache or is something that will be remedied in a move to 90 nm. 1 MB L2 cache is reasonable for the 970+ (using the same naming scheme as the Power-series).

IBM has been using 130 nm fab for about 2 years now, so the transistion from 130 to 90 won't be at any revolutionary pace.

It's a fact that IBM hasn't any systems using 970 themeselves yet. I think that's due to a combination could be of these reasons:
a) Apple has first dibs om 970
b) IBM wan't the 90 nm-version for heat/power issues (in blades, racks and thin clients)
c) They wan't the larget L2 cache
d) They might build a version without AltiVec.

I suspect that IBM might push the current 970 up to 2.5 GHz this winter.

The Power5-derivative is named "GR-UL" or "97x" by IBM. That's a fact. IBM hasn't publicly mentioned any "980" ever.

The 970+ is for 1H04 realease @ 2.5 GHz.
The 97x is for a '04 realease @ +2.5 GHz.

This is the same GHz rating as IBM's 1.8 GHz was, so I won't be surprised that Apple will push 970+ to 3 GHz this summer. I suspect that 97x will clock in at ~3 GHz this time next year. I havn't seen any figure of how far 95x will be pushed.

97x will inherit some cool stuff from Power5 like SMT, better power saving features and an integrated memory controller. AltiVec will be there, and it will be updated to at least 7450-standard.

I think 970+ eventually will be named 970FX, and 97x will be named 975. That'd be consistent with IBM's and Motorola's previous naming of the G3-processors. There's no reason why they should follow the naming scheme of the Power-series.

The coolest part though is that IBM will realease a 3 GHz part before Intel reaches 4 GHz. THAT's impressive. Macs going from 1 Ghz to 3 GHz in 18 months is pretty impressive.

[ffakr]

Originally posted by mvc
ffakr, ddtim, are you both vying for the longest post ever recorded or something?

If you keep quoting each other back and forth like this, we are going to cross some sort of info event horizon and the whole forum will implode up its own watusi.

Brevity is the soul of wit.
haha, I had to cut mine down 5x before it would actually post. that's why I responded back to back. :-)

[ffakr]

Originally posted by Henriok
Actually it is, and so was Power4 and Power3 before it. They all have the full PowerPC ISA, both 32- and 64-bit instructions, in addiion to the POWER ISA and Amazon ISA (used for OS/400).

This is true, something neglected for berevity (and potentially clarity).
The Power ISA is a superset of the PowerPC ISA. Power chips can run PowerPC code, but PowerPC chips can not run Power code (well, I suppose unless it was only a subset of Power ;-)

I was really trying to say that there are two distinct product lines, though they are related (based on ISA). There is a Power line of processors.. processors designed for servers and high end workstations. There is the PowerPC line of processors, designed for low end servers, desktops, and embedded applications.
If IBM says PowerPC, they aren't talking about Power.
If IBM says Power, they aren't talking about PowerPC.

... :-)

[ffakr]

Originally posted by Analog Kid
Actually, cache adds at least as much heat as logic. It also leaks like a sieve at small processes, which is why Prescott is so hot for it's clock speed even at 90nm.

It generates less heat than going to the external memory though, which is why a mobile processor might rely on larger cache.

Intel claims the high heat is a by-product of leak caused by the .09 process (thiner gates, hopping electrons...). They didn't mention the extra cache as being responsible.
I'll defer to more knowledgable people on L2 cache heat though... I'd heard it wasn't as bad as logic, but I could be missinformed.

[yamabushi]

IBM should push 90nm as their standard process and lure more customers to use their fabs. They could do this and gain bragging rights by producing 65nm chips in volume by the end of 2004. Both the 970 and 980 would be good candidates as they would be naturally compared to Intel and AMD consumer level chips.

[Henriok]

Originally posted by ffakr
The Power ISA is a superset of the PowerPC ISA. Power chips can run PowerPC code, but PowerPC chips can not run Power code.

[...]

If IBM says PowerPC, they aren't talking about Power.
If IBM says Power, they aren't talking about PowerPC.Power1 and Power2 wasn't PowerPC-processors but the latter incarnations are. IBM actually do include Power3, Power4 and the Star-series (RS64) of processors when they are talking about PowerPC. The Power3 was even announced as "the next generation 64-bit PowerPC processor".

I wonder where the new Xbox 2-processor will fit into the extended family tree.

[Jagga]

ffakr
I don't think the next 970 will have 2MB cache... it'd be too big for a small server/desktop processor (that is physically too big).

Why do you think 2MB will be too big for a small server/desktop, the original XServe Dual G4 had 2MB of L3 RAM per CPU. Also, in the Quicksilver models the 933Mhz G4 had 2MB, as well as the original Dual 1.0Ghz had 2MB per CPU as well?!!

the number of fans have nothing to do with heat. Granted that one fan would be big and fast and it'd have to move a lot of air.

I mentioned the fan issue in regards to overall system cooling - the entire box - as AMD is trying to move more data per second than IBM 970 for their A64-fx-51. Moving data at high speeds will cause heat, the faster the more at current copper technology (evidence the need for SOI cpu). Again sorry for the heat issue bore but I meant it related to Laptops, not desktops as the A64 will supercede the G5 in laptops.


The whole idea behind Grid computing is clustering computers on a loose grid. if you make super fast nodes, you decrease the need for a grid.

this I understand but their are motherboard manufacturers for AMD that have four CPU on one board. With almost no/low latency between cpu's and memory. DOn't get me wrong I love Apple and don't plan on purchasing intel/amd for the forseeable future, yet I do think that IBM & hence Apple got shifted in the design and usuage of hyperconnects that use hypertransport in the 970. Just think a 40U server rack with 40 XServes, each with 4 G5s that can communicate highly efficiently at super speeds between one another, and between each others memory banks. That would be better than say 2 G5s per Xserve's in the same situation, especially when connecting all of them in a cluster.

Genie


Wow- they only have a 32 bit bus and we have a 64? along with Originally posted by Telomar It's a 32 bit interconnect though so it requires the higher speed.

Actually the interconnects are 64-bit and data travels in both directions at that 64bit rate, in the A64 while the Opteron is 32-bit."Yes,
128-bit data path @ CPU core frequency"
this coming from jonapete2001 AMD site link.

ffakr

But SOI, as I stated, doesn't nescessarily change the typical to max thermal ratio. I don't know if it would, I don't know if it wouldn't. I would imagine that the architecture of the processor would have more to do with this.

Isn't the process, imbedding copper into Silcone to stretch the copper then fold-shrink it, actually part of the architecture of the processor?? Why else do it other than make electrons travel faster?! If that alone then the G5 should be at say 3Ghz already, but shrinking the die size does this, but architecture is how the build it, hence SOI right?!


It is NOT unreasonable to assume that 970s are cooler chips than Opterons when the 970 is roughtly HALF the transistor count of the Opteron, the 970 operates at a lower core voltage, the 970 operates in roughly the same frequency range, the 970 is built on essentially the same process.

understand the facts but "essentially" doesn't mean exactly. IBM had already started producing working, not test yields of the G5 for Apple when AMD approached them with their problem of fabricating the A64 and recently new Opterons. AMD uses more HyperTransport interconnects in the chip than the G5 and it incorperates the memory controller. This caused their problem, yet IBM was able to solve it for them; somehow imbedding the copper in SOI shrinking the copper/SOI combo then removing the SOI to fold or whatever to the copper before coating SOI back onto it. Yes I sound like I've been heating shovel dirt but I DID read it somewhere on net, just cannot remember where. Might have been one of the first reviews of the A64 by wintel fan sites. However, this may change what the max operating heat.

ddtlm

Transistors use power when they switch, and therefore power usage is effected by clockspeed.

I may know not as much as you do but on this paraphrase qoute, hasn't generations of the G4 in powerbooks and now the iBook used less power with increasing clockspeeds??

Telomar

The bitness of the bus is nigh on irrelevant except in terms of the bandwidth available to the bus. The POWER5 uses 2 128 bit buses but that's simply because it needs the extra bandwidth. Even dual channel DDR RAM can't feed the current bus so I wouldn't expect them to bother with the cost of 2 64 bit buses anytime soon.

Um bitness of the bus is relevant, especially in terms of using PCI-X and AGP8x along with memory, DVD-R and SATA drives all jockeying for the maximum bits/bytes to transfer data to and from the CPU, DDRmemory and each other!! Why else do you think the Power5, G5, G4, P4, A64/Opteron need the extra bandwidth compared to say a P2 or G3?!?!:D

Guess I'm just being cheeky

[legion]

Just for clarification in nomenclature:

IBM's chips for servers/workstations are POWER (all caps) series. It is an acronymn (allbeit, a clever one) and describes the chip architecture: Performance Optimized with Enhanced RISC (POWER)

The chips Apple use are PowerPC (no caps) and is a trademark of IBM's.

For more on the PowerPC see:
http://www-1.ibm.com/servers/eserver/pseries/hardware/whitepapers/power/ppc_arch.html#intro
which is a very comprehensive paper for laymen on the PowerPC architecture and its development.

[Phil Of Mac]

PowerPC is a variant of the POWER system architecture for personal computing applications.

[daveL]

Phil of Mac: Gotta like patrick0brien!

[ffakr]

Originally posted by Phil Of Mac
PowerPC is a variant of the POWER system architecture for personal computing applications.
According to an old book on the PowerPC (forgot name, black with red name.. tossed it years ago), The PPC is based off POWER but it's based off POWER back when POWER was a 6 chip set not one cpu! That is, 6 component processors made up the POWER CPU.
Old stuff (we actually had an OLD POWER in a lab at my last place.. freaked out my techs when they looked inside)

anywho.. Apparently the PowerPC also took design queues from some Motorola RISC design, though I can't possibly remember which one at this point. I don't think it was very successful.

Just saying. :-)

[daveL]

Originally posted by ffakr
anywho.. Apparently the PowerPC also took design queues from some Motorola RISC design, though I can't possibly remember which one at this point. I don't think it was very successful.

Just saying. :-)

Moto 88K. Used in the DG Aviion line of Unix machines (SysVr4). Early 90s. Too little, too late. Seems to be Moto's corporate anthem. Some things don't change, much.

[ffakr]

Originally posted by Jagga

Why do you think 2MB will be too big for a small server/desktop, the original XServe Dual G4 had 2MB of L3 RAM per CPU. Also, in the Quicksilver models the 933Mhz G4 had 2MB, as well as the original Dual 1.0Ghz had 2MB per CPU as well?!!

That was L3 Cache chips in addition to the CPU. I'm talking about adding an additional 1.5 MB of L2 on the same die as the CPU.
IBM could easily make a PowerPC with 2MB of L2 cache, even on .13 micron, but it would be a lot bigger physically. It would take up more space on an expensive multilayer platter. This would drive down the number of chips per wafer and increase the cost of each processor. It would also increase the heat dissipation of the processor.
IBM will take multiple criteria into consideration when upping the cache:
- what is an optimal CPU die size (mm^2) to work with, dies too small are difficult to work with.. difficult to connect to the packaging.
- what amount of L2 is reasonable for typical desktop use at a given processor speed (with a fast system bus)
- at what point do increasing L2 sizes get outweighed by increasing cost
...

Isn't the process, imbedding copper into Silcone to stretch the copper then fold-shrink it, actually part of the architecture of the processor?? Why else do it other than make electrons travel faster?! If that alone then the G5 should be at say 3Ghz already, but shrinking the die size does this, but architecture is how the build it, hence SOI right?!
Well, the Copper is way too small to fold and shrink it. CPUs aren't made like horseshoes or swords. The metal is formed by etching it with light. (pretty cool). CPUs manufacturing is closer to silkscreening tshirts than it is to hammering out a metal frame.
As far as "Architecture", I don't know of anyone who would describe a computer CPU architecture by including the process it's produced on. The process would be important in determining what Architecture would be feasible, but when I say architecture I'm basically refering to the layout of the processor logic, not the silicon.

I may know not as much as you do but on this paraphrase qoute, hasn't generations of the G4 in powerbooks and now the iBook used less power with increasing clockspeeds??

Not the same thing. The architecture evolved, and the transistor count of the G4 family has increased, but this has happened as the process has evolved and shrunk, and (yes) as the architecture has evolved. Motorola designs the G4 to be a low power embedded processor just as much (if not more) than it designs it to be a desktop processor.
OTOH, if you hold everything else consistent, process size, process materials... and you make the CPU bigger, or if you raise the core voltage to push the clock speed up, you'll generate more heat not less.


Um bitness of the bus is relevant, especially in terms of using PCI-X and AGP8x along with memory, DVD-R and SATA drives all jockeying for the maximum bits/bytes to transfer data to and from the CPU, DDRmemory and each other!! Why else do you think the Power5, G5, G4, P4, A64/Opteron need the extra bandwidth compared to say a P2 or G3?!?!:D
I think you missed the point here. I think the original argument was NOT that bitness was irrelevent, rather that you can't rely on the bit width. It's ALL ABOUT BANDWIDTH. You can have a 1 bit wide serial bus running super fast that has more bandwidth than a 64bit wide bus that runs much slower. This is why Serial ATA is faster than older parallel ATA.
It doesn't really matter if one processor has 32bit wide system pipes, or 128 bit wide pipes... what it comes down to is how much data can be pushed through those pipes.
So... Bitness isn't directly relevent to all those peripherals and buses you mentioned... the available bandwidth is. This why 16bit HT pipes are more than fast enough for all the external buses on a modern machine (usb, firewire, SATA...)
Also, I thought I'd mention that alot of the stuff you mentioned doesn't need lots of bandwidth to the CPU. DMA is direct memory access and it used on all modern peripherals. Not only that, AGP is designed to allow video cards to have direct access to the system memory if needed. just picking nits.

[sethypoo]

This is so cool!

Can't wait until they solve all the heating problems and get a 2 or 3Ghz G5 into a 12" PowerBook. Some Firewire 800 ports and a standard DV out would be great too!

:) :rolleyes: :D

[Genie]

I think this thread has gone over my head...:confused:

[Henriok]

I made this PDF (http://macnytt.se/files/files/henrik/PPC-chart1.7.pdf)_to illustrate the family tree of the POWER, PowerPC and PowerPC-AS (Amazon) processors. I have not included the majority of embedded processors but that's something I want to do in the future.

The chart is as complete as I can make it. If anyone have any additional information or suggestions. Feel free to email me, so I can correct or update it.

I thought it might be of interesst to the crowd here. Please note that the specs, names and release dates of future processors are moving targets.

[Genie]

Originally posted by Henriok
I made this PDF (http://macnytt.se/files/files/henrik/PPC-chart1.7.pdf)_to illustrate the family tree of the POWER, PowerPC and PowerPC-AS (Amazon) processors. I have not included the majority of embedded processors but that's something I want to do in the future.

The chart is as complete as I can make it. If anyone have any additional information or suggestions. Feel free to email me, so I can correct or update it.

I thought it might be of interesst to the crowd here. Please note that the specs, names and release dates of future processors are moving targets.

That is a very detailed chart- must have taken you days!

[daveL]

Originally posted by Henriok
I made this PDF (http://macnytt.se/files/files/henrik/PPC-chart1.7.pdf)_to illustrate the family tree of the POWER, PowerPC and PowerPC-AS (Amazon) processors. I have not included the majority of embedded processors but that's something I want to do in the future.

The chart is as complete as I can make it. If anyone have any additional information or suggestions. Feel free to email me, so I can correct or update it.

I thought it might be of interesst to the crowd here. Please note that the specs, names and release dates of future processors are moving targets.
Very nice work! One thing I noticed: You have no 97x counterpart to the Power5+, leaving a rather long stretch without an obvious 97x improvements. I'm not saying there needs to be an association (97x -> Power5+), only that you don't indicate one.

Thanks! And please post updates!

[Henriok]

Originally posted by daveL
Very nice work! One thing I noticed: You have no 97x counterpart to the Power5+, leaving a rather long stretch without an obvious 97x improvements. I'm not saying there needs to be an association (97x -> Power5+), only that you don't indicate one.First.. it did take days, several days. This is the 7:th version of it too. Each revision adds processors (this one added the Xbox 2-processor and my best guess is that it will be based on the 970) and revised graphics.

The only processors that goes into the chart are processors that either have a confirmed existence, or are rumoured to come. I also must have some sort of technical spefification too, like what fab it'll be manufactured in, or what frequency it'll run in and so forth. I haven't seen any rumor of a successor to 97x, but I'm certain that there will be one. I just don't have any data on it, so it won't be on my chart 'til there is.

And.. if there is one, I bet it'll be based on 97x, not Power5+. Just like 970+ is based on 970, not Power4+. The plus-processors are quite similar to their predecessor, but made on a smaller fab.

[yamabushi]

So would that make a 65nm 970 a 970++?:)

[Rincewind42]

Originally posted by yamabushi
So would that make a 65nm 970 a 970++?:)

I doubt we will ever see the 970 on a 65nm process if it goes to a 90nm process. The 97x will probably start at 90nm and goto 65nm before that could happen.

[yamabushi]

Unit cost could be a driving force to move the process down. Adding transistors to modify the current design would be counterproductive to cost control. A slightly improved 970 at 65nm and low clock speeds could serve as a complete replacement of the G4. I believe the G4 has a poor price to performance ratio at release dates compared to other PPC chips. I think that a low clock 65nm 970 would be superior in this regard, especially so on larger wafers. Higher clock speed versions of the same chip could make their way into midrange systems and replace 90nm chips. The next large evolutionary step (980) could start on this process for high end systems. This all would only hold true if full scale production on the 65nm process could be realized within one year, which is possible.

[Henriok]

The PDF (http://macnytt.se/files/files/henrik/PPC-chart1.7.pdf) is updated. The major thing that's new is fabrication processes. From 1.2 microns (1992) to 45 nanometer (2008). I haven't been able to get data om the early processors (like POWER1) so that's a white spot on my map unfortunately.

Yeah I know that the chart is quite messy now, but it's not completely unreadable :)

Some other subtle corrections and additions went into this version too.

Enjoy!

[nigel_2008]

Interestingly IBM seem to plan to boost the speed of their 970 based bladeserver by 50% in mid 2004 from 1.6GHZ to 2.4GHz.
If the same applied to Apple then 2.0GHZ becomes :)

See http://www.infoworld.com/article/03/11/14/HNibm64bitblades_1.html?platforms

[yamabushi]

It's interesting that IBM chose their current low end 970 at 1.6GHz for the current blade server. If we were to make the assumption that they will use chips with similar thermal properties for the next blade server, that would place the 90nm 970 at 2.4GHz close to the 130nm 970 at 1.6GHz. This is great news because it could mean that a 90nm 970 at 2.8GHz might be feasible at some point in 2004.