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arn
Nov 13, 2003, 02:58 AM
http://pcweb.mycom.co.jp/news/2003/11/12/10.html

Specifically the section which starts "IBM Design and Implementation of the POWER5 Microprocessor"

thanks

arn

Sun Baked
Nov 13, 2003, 03:05 AM
Not all of it -- but it was mentioned on the ARS PPC 970 Architecture thread (http://arstechnica.infopop.net/OpenTopic/page?q=Y&a=tpc&s=50009562&f=8300945231&m=9080959175&p=17)

Ooops...

Would have thought they would have had it translated by now guess not.

Considering where M.Isobe lives.

yamabushi
Nov 13, 2003, 10:37 AM
This page briefly describes the content of lectures given at this conference. The section about some of the lectures given by IBM states the following:

In a lecture entitled "Design and Implementation of the POWER5 Microprocessor" IBM will announce the design of the POWER5 processor will use a 130nm process, have 276 million transistors, and run at clock speeds of 1.5GHz and higher. Also, in a lecture entitled "PowerPC 970 in 130nm and 90nm Technologies" IBM will announce the introduction of 90nm SOI technology to the PowerPC 970.



Edit: changed to future tense after I noticed the date of the conference.

yamabushi
Nov 13, 2003, 10:43 AM
Also of some interest further down the page is that Intel described the technologies they are employing when moving to a 90nm process for the Pentium4. I can supply a translation if you like, but there really isn't anything they haven't stated elsewhere.

yamabushi
Nov 13, 2003, 10:54 AM
I noticed that this International Solid-State Circuit Conference isn't until February 15, 2004. Hopefully either a transcript of the lectures or a more detailed summary will be available soon after that date.

yamabushi
Nov 13, 2003, 11:18 AM
It is also interesting to note that IBM has ten essays total that were accepted, which is more than any other organization. Intel had nine essays accepted. In total 406 essays were submitted and 204 were accepted.