Originally posted by snoopy
In my simplistic thinking:
G3 is basic PPC with backside L2 cache.
G4 is a G3 with AltiVec and multi processor capable.
G5 is a 64 bit G4.
It makes sense to me, but someone can likely find holes in this.
Originally posted by snoopy
In my simplistic thinking:
G3 is basic PPC with backside L2 cache.
G4 is a G3 with AltiVec and multi processor capable.
G5 is a 64 bit G4.
It makes sense to me, but someone can likely find holes in this.
Originally posted by Site 5560
It was my impression that Motorola holds the primary license to the 6xx, 7xx, 7xxx, 8xxx, etcxxx. architecture and IBM is delayed in bringing their products to market for this reason (the delay usually results in cooler running more reliable versions of the processors). Thus the lame Moto has been holding things up across the board. It seems that the IBM Power64 is not of this licensed architecture, thus it may be IBM' first chance to bypass Moto.