Ivy Bridge is not a "magic wand" that solves the Thunderbolt issue.
There is a very good reason a 'new' Mac Pro wasn't released in 2012, because the Xeon Chipsets can't use thunderbolt.
Funny how the X79 ( as derivative of the C600 chipset used with the Xeon E5 1600/2600 series ) manages to be a viable solution in your post less than an hour after this one (post #55 where your company composes a x79 solution to the problem that isn't a reference board. )
Thunderbolt hasn't been integrated into the chipset yet.
Thunderbolt is unlikely to be integrated into the chipset (I/O hub). Two major reasons.
A. Need to be at the edge of the system. There is a max distance you can put the controller from the physical port. So inttegrating would drag an I/O or CPU package closer to the edge. That isn't a option for larger and hotter chips.
B. The GPU output probably won't go into the I/O hub chipset over time. The two necessariy ingredients for integrations are PCI-e lanes and displayPort signals. Both of those are present in more CPU packages than I/O hubs (old southbridge ) chipsets. Likewise if Thunderbolt tries to go faster PCI-e v3.0 would be a necessity which chipsets won't necessarily follow as fast with ( I/O relatively just got to v2.0 lanes).
Chipsets which have Intel's FDI can provide the video straight from the chipset (hence why the chipsets with integrated graphics can support thunderbolt) and theoretically it could be pulled out from almost any video card that has a DisplayPort
Pretty sure on Intel's roadmap the CPU packages would be able to output Display Port directly. It was a stopgap to run the display through the I/O Hub.
Besides the ingrated GPU isn't material. A embedded discrete GPU can just as easily be hooked up (e.g., iMac and MBP 15" models. ). There is no need to get the signal off of a "video card".
The PCIe lanes can be tapped from the chipset itself as most have 4-8 spare lanes which are usually fanned out into 1x and 4x slots.
In generic PC board designs. Not in mac ones. The recent Mac Pro's slots are hooked to the Northbridge chipset. The I/O Hub is not used small slots (i.e, bluetooth, eithernet, ) at all. It is hooked to embedded controllers but not sltots in the connotation you are getting at.
These lanes aren't multiplexed which means they'd have to be fed into an add-in Thunderbolt controller instead of a slot on the motherboard. This cannibalizes the user's ability to use add-in PCIe cards.
Not. There is no slot limitation here in a Mac Pro design context.
What was formerly the Northbridge, high bandwidth PCI-e lanes , connection is subsummed into the Sandy Bridge (and Ivy Bridge same limitations) Xeon E5 design. There are 40 lanes per CPU package.
A 16, 16, 4, 4 ( the current mac pro PCI-e socket set up) could be fully realized just with CPU connections. That leaves the C600 series's x8 PCI-e lanes fully available for Thunderbolt controller use after
zero slot use. That is the
same limitation (use I/O Hub's lanes) the rest of the 2012 Mac line up labors under and they
all manage to get a discrete Thunderbolt controller into the system solution.
Even if Apple went with a 16 , 8 , 8 , 4/4 , 4 set up where an x8 lane got assigned to the embedded GPU , the two x4 slots share a switched connection (like they do now on the current Mac Pro with a 36 lane limitation), and 4 got assigned to Thunderbolt it *still* wouldn't be a PCI-e limit to impair slots.
The much larger pressure to loose a slot is indirectly through the allocating x16 to an embedded GPU.
In simple terms, until thunderbolt is added natively to the chipset ( presumably will be in the ivybridge-E and server grade processors line up) Apple won't release a 'new' generation Mac as they want there entire lineup to carry thunderbolt.
Ivy Bridge Xeon is extremely unlikely to bring anything to the solutions that Sandy Bridge doesn't already have. The I/O chipset isn't likely to change. The CPU packages are socket compatible so nothing there either (in terms of PCI-e lanes).
Apple's work for a Mac Pro oriented design would be a bit easier for the single CPU package model if there was an integrated GPU. The dual package configuration with 80 PCI-e lanes is hardly even close to being limited in PCI-e lane availability if Apple sticks to just 4 physical slots.
It wouldn't be surprising if there were Haswell or Broadwell versions of the E5 1600 series with integrated GPUs. The core count kept to the same 4-6 (maybe 8) core range and some additional transistor budget allocated to a substantially more GPGPU capable integrated option ( HD4500 or HD5000 derivative).
The C600 I/O chipset has x8 lanes which can be set x4 , ,x1 , x1, x1, x1 . It is really controllers battling for those limited x1 lanes than the x4 bundle if they choose to route Thunderbolt that way.
Ethernet , Bluetooth , Firewire , audio I/O, and system-management I think are the current 5 or so usages. USB 3.0 would probably cause two of those to be bumped to a shared switched connection (e.g., audio and system-management). Or Apple could swap USB 3.0 for Firewire (not like they haven't booted it from other 2012 revisions).
In short, in most Apple designs over the last 6-9 years there has always been a couple "left over" lower bandwidth PCI-e lanes left unused.
