|Jan 30, 2004, 10:28 PM||#1|
Photo and story of a IBM 8-way POWER5 chip with 144MB Cache.
Link: Photo and story of a IBM 8-way POWER5 chip with 144MB Cache.
Posted on MacBytes.com
Approved by Mudbug
|Jan 30, 2004, 11:37 PM||#2|
whoa. if nothing more, check out the size of that thing!
I think I understand what you're talking about, but where are we going to find a duck and a rubber hose at this time of night?
|Jan 31, 2004, 12:24 PM||#3|
Now if they could just throw a 12MB cache on the next derivative G5+ or G6.
Of course each chip would probably cost $6-8K.
(Just look at the price of the P4EE with 4Mb L3 Cache)
I just bought a Mac to help me design the next Cray."
- Seymoure Cray (1925-1996) when was informed that Apple Inc. had recently bought a Cray supercomputer to help them design the next Mac.
|Jan 31, 2004, 04:50 PM||#4|
The PPC 980 (what future Macs may be built around) will only have one or two CPU cores and will probably have much less cache. So it won't be quite that big.
Also, that article says that the POWER-5 is based on 130nm tech. It says that a future Power-5+ will be based on 90nm. This will probably make the whole package a bit smaller. (Or maybe not, depending on if they want it to be pin-compatible with the 130nm packages or not.)
|Feb 1, 2004, 12:18 AM||#5|
Wow... that is a HOT chip...
Improve preformance in HyperThreading SMT thingy... good to hear... maybe in the Next like of ApplePowerMac's... better...
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