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Old Jan 30, 2004, 10:28 PM   #1
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Photo and story of a IBM 8-way POWER5 chip with 144MB Cache.


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Link: Photo and story of a IBM 8-way POWER5 chip with 144MB Cache.

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Old Jan 30, 2004, 11:37 PM   #2
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whoa. if nothing more, check out the size of that thing!
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Old Jan 31, 2004, 12:24 PM   #3
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Uhm

Now if they could just throw a 12MB cache on the next derivative G5+ or G6.
Of course each chip would probably cost $6-8K.

(Just look at the price of the P4EE with 4Mb L3 Cache)
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Old Jan 31, 2004, 04:50 PM   #4
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Quote:
Originally posted by Mudbug
whoa. if nothing more, check out the size of that thing!
No kidding. Note from the caption (above the image) that this photo is of an 8-core variant with 144M of cache.

The PPC 980 (what future Macs may be built around) will only have one or two CPU cores and will probably have much less cache. So it won't be quite that big.

Also, that article says that the POWER-5 is based on 130nm tech. It says that a future Power-5+ will be based on 90nm. This will probably make the whole package a bit smaller. (Or maybe not, depending on if they want it to be pin-compatible with the 130nm packages or not.)
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Old Feb 1, 2004, 12:18 AM   #5
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Wow... that is a HOT chip...

Improve preformance in HyperThreading SMT thingy... good to hear... maybe in the Next like of ApplePowerMac's... better...

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