Newsfactor reports on some developments from IBM regarding the PPC. As well as lays out some plans for both IBM and Motorola: IBM's PowerPC roadmap, which is completely devoid of any reference to the AltiVec acceleration unit, calls for chip architecture to exceed the 2 GHz barrier in the coming year. While keeping mum on specifics, the company did say that its upcoming chips will be multi-core, meaning that several processor cores can be arranged on a single chip. This technology allows the possibility of four-processor or even eight-processor configurations. Motorola also has said it plans to exceed the 2 GHz barrier in the coming year and is calling for the same I/O improvements and pipeline upgrades offered by IBM. However, Motorola does not intend to move its PowerPC line to the .13 micron manufacturing process, which IBM already uses, until it ships the G5 processor.