Photo and story of a IBM 8-way POWER5 chip with 144MB Cache.

Discussion in 'MacBytes.com News Discussion' started by MacBytes, Jan 30, 2004.

  1. macrumors bot

    Joined:
    Jul 5, 2003
    #1
  2. Administrator emeritus

    Mudbug

    Joined:
    Jun 28, 2002
    Location:
    North Central Colorado
    #2
    whoa. if nothing more, check out the size of that thing!
     
  3. macrumors member

    Joined:
    Jun 27, 2003
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    Bronx, New York
    #3
    Uhm

    Now if they could just throw a 12MB cache on the next derivative G5+ or G6.
    Of course each chip would probably cost $6-8K.

    (Just look at the price of the P4EE with 4Mb L3 Cache)
    :D
     
  4. macrumors 68040

    shamino

    Joined:
    Jan 7, 2004
    Location:
    Vienna, VA
    #4
    No kidding. Note from the caption (above the image) that this photo is of an 8-core variant with 144M of cache.

    The PPC 980 (what future Macs may be built around) will only have one or two CPU cores and will probably have much less cache. So it won't be quite that big.

    Also, that article says that the POWER-5 is based on 130nm tech. It says that a future Power-5+ will be based on 90nm. This will probably make the whole package a bit smaller. (Or maybe not, depending on if they want it to be pin-compatible with the 130nm packages or not.)
     
  5. macrumors 604

    MrMacMan

    Joined:
    Jul 4, 2001
    Location:
    1 Block away from NYC.
    #5
    Wow... that is a HOT chip...

    Improve preformance in HyperThreading SMT thingy... good to hear... maybe in the Next like of ApplePowerMac's... better...

    :D
     

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