Why no 2.3ghz Air?

Discussion in 'MacBook Air' started by pjny, Jul 21, 2011.

  1. macrumors 6502

    Joined:
    Feb 18, 2010
    #1
    Hi,

    My friend is new to Mac after 20 years with PC. He wanted to know why Apple can't/won't put in a 2.3ghz chip in the Macbook air. Is it because Apple wants to stratify their lineup or is it because of chip size in such a compact machine?

    I thought it was because the chip would be too big, use too much power and generate too much heat in such a small machine. I think it's a matter of time before they put it in.

    Whaddaya you say?
     
  2. macrumors 6502a

    Joined:
    May 3, 2011
    #2
    because there are no 2.13ghz in the sandybridge series which have the 17W TDP as the ones currently offered in the MBA lineup. Apple is basically not giving up battery life/heat.
    for your friend, advise him to read the first page of this site where the new mba's compare to 2.67ghz i7's from last year.
     
  3. macrumors member

    Joined:
    Nov 10, 2010
    #3
    Clock speed is not that important, the architecture is. The sandy bridge is over 2x more powerful than last year's higher clocked c2d model's.

    Also the sandy bridges have a turbo boost mode, IIRC the 1.7 can turbo boost to 2.7ghz.
     
  4. macrumors newbie

    Joined:
    May 19, 2010
    Location:
    Vienna, Austria
    #4
    Just tell your friend, that more MHz doesn't mean more power. A 3GHz Pentium 4 with 3GHz and crappy Netburst-architecture would be nice, hmmm? ;) It was Intels greatest move to kill the MHz-race with the dead of Pentium 4.
     
  5. macrumors 6502

    Joined:
    Feb 15, 2009
    #5
    Yeah, the clock speed might make them sound slow-ish, but they are much faster than the previous gen! [​IMG]
     
  6. macrumors 6502a

    Joined:
    Mar 21, 2010
    #6
    here's a clock speed analogy. In the P4, you have that really long pipeline and periodically, there'd be pipeline flushes that empty out the pipeline and the CPU becomes idle waiting for the pipeline to fill up again. Think of each pipeline flush as a "mistake."

    Basically, the P4 while it runs really fast, it makes tons of "mistakes" and thus has to waste lots of time to correct them and it only does one task at a time. The Sandy Bridge architecture while running slower clock speed wise, makes far fewer mistakes, has a much shorter pipeline so when it does make a mistake, the time to correct it is much shorter, and it can carry out 4 tasks at a time, and runs way cooler as well.
     

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