Slightly more technical explanation
provided by a friend and guru
DDR processes data sets on alternating sequences, the sine wave analogy was really quite good - it really isn't any faster in actual memory latency, but "potentially" does a better job of keeping up with the processor in providing data. Alas, DDR only reaches its full potential in a hardware architecture that can take advantage of it.
I must say I am suprised Apple hasn't done anything with DDR yet.
On the same subject, slightly different flavor - we are in the process of transitioning all of our mac users to TiBooks. According to some sources, Apple requires CL2 however in the TiBooks we have received to date, it is all CL3 memory installed (the number refers to the latency).
anyone else have more information?