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I thought that only the fourth module will be slower when accessed. Not the entire lot of ram. Am I mistaken?
 
I thought that only the fourth module will be slower when accessed. Not the entire lot of ram. Am I mistaken?

With this specific situation it changes to interleave across the channels in a dual channel type way. It is supposed to be faster than dual channel would be mathematically, but the numbers give dual channel like speeds on the Mac Pro because there is a futher speed penalty when using more than 1 Unbuffered DIMM on any channel. If (on a 6 DIMM per socket board) you have 2 DIMMs on 2 channels and 1 DIMM on 1 channel, then you (logically) get 3 acting at triple channel speed and the other 2 as dual channel.
 
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