Almost Page 2 worthy Intel chip speculations ...

[gekko513]

The Inquirer has posted this rather interesting article, where they speculate about the upcoming chip release at next week's Intel developer forum. The firm is due to announce a next generation x86 processor core.

The author thinks it will be a radical change from all current Intel architectures: Pentium M, Itanium and the Pentium 4. He thinks the chip will be at least quad core and will use software to translate x86 code (why not also PPC code) on the fly into a simpler machine code, kind of like the Transmeta chips. Intel will succeed where Transmeta failed because they can use several cores and more cache to execute the code translation without delay.

I didn't see any threads on this here on macrumors ... sorry if it has already been posted.

 

[Abstract]

Sounds interesting. I don't know what this means, but it is interesting.

I just don't know why it would be beneficial for a chip to translate x86 code into an intermediate code first. Sounds like an extra step.

 

[greatdevourer]

Sounds interesting. I don't know what this means, but it is interesting.

I just don't know why it would be beneficial for a chip to translate x86 code into an intermediate code first. Sounds like an extra step.

What the article is getting at is that it's an entirely new archetecture. The whole thing about translating x86 code is just to make the developers not feel so flustered that they'll have to re-code everything.

Me likes. Me likes much. This might make the Mactels quite good. It would also make running OSx86 from one of the dev kits obsolete

 

[savar]

Sounds interesting. I don't know what this means, but it is interesting.

I just don't know why it would be beneficial for a chip to translate x86 code into an intermediate code first. Sounds like an extra step.

X86 chips already translate x86 instructions into a lower-level code, called micro ops or written uops for short (where 'u' is the greek letter mu). Lots of instructions translate to just one, two, or three uops, but some x86 instructions emit dozens of uops.

The article is interesting speculation, but I'd be suprised if Intel did something that wild. The Pentium M is still young, and just the first step in a new direction for Intel. I'd be surprised if they ditched it already. Check out arstechnica for more info on the above.

 

[gekko513]

Sounds interesting. I don't know what this means, but it is interesting.

I just don't know why it would be beneficial for a chip to translate x86 code into an intermediate code first. Sounds like an extra step.

Like the others said, the Pentium already translate x86 instructions into micro ops.

The reason why they do this is that the x86 instructions are old and so complicated that they execute inefficiently in modern hardware. Simple instruction are easier to execute fast in a pipeline.

The difference between the current Pentium solution and the one that the article talks about is that the Pentium solution translates in hardware and the resulting micro ops need out-of-order execution to run fast. The article suggests software translation of instructions. This could have some advantages, like more intelligent and adaptable translation. Specifically they mention that the operations can be made to run fast without requiring out-of-order execution.

If the new architecture can get by without out-of-order execution, it can be made to run at a faster clock frequency while at the same time consuming less power (and producing less heat).

 

[Xapplimatic]

.... The Pentium M is still young, and just the first step in a new direction for Intel. I'd be surprised if they ditched it already. Check out arstechnica for more info on the above.

Actually, I believe Pentium M is just a reworked version of Pentium III. M stands for "modified"? It's the Pentium IV design that has been--for the most part--ditched...(and the burning Lamee bunnysuits..