The i5 and i7 Arrandale processors and memory latency

[JimKirk]

Since Intel decided to give everyone the shaft and force feed their integrated graphics, they have moved the on die memory controller to the graphics part.

Probably because their graphics performance sucked so bad they wanted the memory access better.

As a result, memory latency is no longer on die, but is on package. This means memory latency for this CPU is going to be high and that memory bandwidth is going to be low.

http://www.hardwarecanucks.com/foru...unch-clarkdale-core-i5-661-cpu-review-12.html

 

[dusk007]

It is true that Arrendales Memory Access sucks but I doubt it is because of the IGP. All IGPs with Core 2 had memory controllers on the same die and sucked. This one is a lot faster while almost the same specification. Having the memory controller on the same DIE has nothing to do with it.

Intel simple put an old G45 Chipset with the new Intel HD GPU core on the same package. In Intels perspective this makes perfect sense
+ less dev. cost
+ they have a use for the old 45nm fabs
+ the 32nm chip is really small -> good for yield
+ integrating everything and moving to 32nm at the same time is difficult.
+/- it is slower but that helps to give the Corei 7 quads an edge (since they are still 45nm and can't reach high clock speeds) and it helps to show a bigger improvement next year with Sandybridge.


Anyway it doesn't hurt to tell it again, as there are still a lot of people that assume Memory Access is better.

 

[JimKirk]

They could have left the memory controller on die

And still added the 45 nm GPU.

They decided to do it to speed up memory operations for the graphic core.

No other reason. It was already integrated with lynnfield.