800 MHz bus a reality!

[benixau]

look - architecturally PPC is superior left right center and everywhere inbetween aswell as around.

architecturally - x86 is more popular because it is cheaper. It always will be because more of the worlds computers ship with it.

architecturally - PPC is the design running 5/6 of the processors in my house. (2x DP-MDD1083 + eMac700 + AMDXP1800+)

go team PPC. and never ever ever ever ever ...... ever go with moto again. IBM have proven again and again that they are better at PPC than moto. now they have SIMD motmo had better come up with something super duper good i.e. at 5Ghz or i hope/dont think we will see another in a mac for a long time.

 

[nuckinfutz]

I think it's embarrassing. The 970 better come out in June, and Hypertransport had better rock hard, or it will be downright humiliating. And unless I have a misunderstanding about what Hypertransport it, it still won't address our BUS speed woes between hardware components.

Yes it's obvious you have a severe misunderstanding of Hypertransport on how a FSB functions. The current limitation of Macs is the MPX bus which doesn't support DDR. Should Apple move to the PPC 970 they will only need decide what Processor interconnect to use. Believe me DDR suppor is required as the PPC 1.8Ghz has a 6.4Gbps throughput. Hypertransport is a fast way of connecting Busses. Apple could use HT to connect the FSB to other MB Busses. I believe you might be able to base your whole FSB on HT but it seems to be a pretty flexible system. Currently the AMD nForce motherboards uses Hypertransport to connect the North and South bridges. They say that allows them to run the 6.1 audio because of the increase in speed.

Don't you worry. The 970 is used will rememedy any complaints about bus speed. Although I'd LOVE to see it in June as you would..the sooner the better.

 

[macrumors12345]

Originally posted by QCassidy352
"OK, this is kinda funny. The 970 is announced with a double pumped 450MHz bus and mac users go insane over it. The Pentium 4 is announced with a quad pumped 200MHz bus, and everyone goes 'oh, it's not actually 800MHz, it doesn't matter'. "

agreed. whatever it is technically

It is NOT a technicality, and dismissing it as such simply demonstrates the complete lack of information that is circulating out there.

The following is undoubtedly something of a simplification, but hopefully the basic point is nevertheless clear.

There are two dimensions that effect memory performance: bandwidth and latency. Bandwidth you can think of as being the total amount of information that can be moved in a unit of time, and latency you can think of as being how long it takes to find and begin transferring that information. If you think of it in terms of a hard drive, bandwidth corresponds to the peak transfer rate (e.g. 40 MB/sec) and latency corresponds to the access time (e.g. 6 ms).

The key thing is that double-pumping (or quad-pumping) doubles (or quadruples) the theoretical peak bandwidth, but does essentially NOTHING to improve latency. The bus can now transfer twice as much information with each clock cycle, but the clock cycles aren't coming any faster. Therefore, for applications in which latency is more important than bandwidth, using a 167 mhz bus can actually be faster than using a double-pumped 133 mhz bus (what you would erroneously refer to as "266 mhz"). These applications would be ones which need to access lots of different pieces of information.

The bottom line is that all other things being equal, a double pumped 400 mhz bus is better than a quad pumped 200 mhz bus because they both have the same theoretical bandwidth but the former has better latency than the latter. Likewise, an 800 mhz single data rate bus would be better than either.

Now, in this specific case I believe it doesn't matter as much because the fastest DDR memory currently available, DDR400, is just double pumped 200 mhz memory, and presumably having your bus run at twice the frequency of the memory is not all that useful in terms of reducing latency (they use dual-channel to get the memory bandwidth to match up with the FSB bandwidth). But in general it is important to note that double-pumping is NOT exactly the same as just doubling the clock speed, because latency DOES matter!

 

[yzedf]

Latency does matter. But so does the size of the chunk that is being moved. That is why (I think) that we are seeing double and quad pumped system architectures. It is better (for 32bit stuff) to move larger chunks, rather than smaller chunks faster. Less oportunity for error. Which given the current state of professional programming (I use the term loosely) is very important. The only good code (in every sense of the word) is for use on a mainframe or similar "super computer." Every new mainframe IBM makes will run the code from the previous versions, WITHOUT A RECOMPILE OF THE CODE. Regardless of what hardware or OS version. Why doesn't the PC market aspire for such capabilities?

 

[bousozoku]

Originally posted by yzedf
Latency does matter. But so does the size of the chunk that is being moved. That is why (I think) that we are seeing double and quad pumped system architectures. It is better (for 32bit stuff) to move larger chunks, rather than smaller chunks faster. Less oportunity for error. Which given the current state of professional programming (I use the term loosely) is very important. The only good code (in every sense of the word) is for use on a mainframe or similar "super computer." Every new mainframe IBM makes will run the code from the previous versions, WITHOUT A RECOMPILE OF THE CODE. Regardless of what hardware or OS version. Why doesn't the PC market aspire for such capabilities?

Well, it may just be that the virtual machine is a thick layer which demonstrably slows the performance of the machine. Yes, the benefits are great and IBM's OS/400 (and CPF, prior to that) has shown this time and time again. Yes, it's amazing that code developed on the IBM System/38 in 1979 still runs on today's iSeries with no or minimal changes, but without the virtual machine, the hardware would run applications far faster.

It takes a hefty machine to manage the optimised code. Each iSeries has at least one main processor, a Power4, and up to 31 others. It also has tens to hundreds of I/O processors dedicated to off-loading tasks from the main processor.

Imagine the cost of using a virtual machine instead of a simple HAL (hardware abstraction layer) such as Windows NT, 2000, XP, and Mac OS X use. Yes, you can put any real hardware under it, but you have to have more of it to make the machine run acceptably well.

 

[jefhatfield]

Re: 800 MHz bus a reality!

Originally posted by yzedf
But not for the Mac

http://slashdot.org/article.pl?sid=03/04/14/1111233&mode=nested&tid=118&tid=137

Of note is the massive improvement in memory access speeds over the previous architecture (2nd graph):

http://www17.tomshardware.com/mainboard/20030414/i875p-22.html

When is the 970 coming? It had better be soon...

970 or g5 or whatever...amd is coming out, maybe, with a 1 ghz+ fast bus in a chip as early as this fall...and 64 bit!

 

[FelixDerKater]

If it is dual-channel DDR 400 could that not use the 800MHz bus? Assuming that both channels run at 400MHz, then that would be able to nearl saturate the bus.

 

[MacCoaster]

Originally posted by FelixDerKater
If it is dual-channel DDR 400 could that not use the 800MHz bus? Assuming that both channels run at 400MHz, then that would be able to nearl saturate the bus.

Yep, dual channel 400 = 800 MHz effective.

From the memory benchmarks, holy christ. Apple has a lot of catching up!