990's in 2005?? That would be awesome, since that's right when i'd be getting a new computer. I cant wait.... G7 sounds so.... *gargling sound*
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90nm PPC 970's & Altivec 2
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well, although we have waited how many years for the G5, we will only have to wait 2 more years to get to a G7? does that mean in 2020 we will be at the G12? no way. it might take a little longer than that? right?
unless if IBM is really fast, we won't be doing that.
unless if IBM is really fast, we won't be doing that.
the G5s aren't even shipping and we talking about G7s? 
By the time they come out, you won't want them; you'll want G8s.
Sorry, it just seems silly to me to speculate beyond a couple of months, or at most a year (since Jobs did use that time frame himself).
By the time they come out, you won't want them; you'll want G8s.Sorry, it just seems silly to me to speculate beyond a couple of months, or at most a year (since Jobs did use that time frame himself).
We already have a G8, its just not a processor chip!Originally posted by QCassidy352
the G5s aren't even shipping and we talking about G7s?
Sorry, it just seems silly to me to speculate beyond a couple of months, or at most a year (since Jobs did use that time frame himself).
One thought that's rumbling round my mind re: the G5's cooling and the heat generation of current G5s.
The case design will no doubt outlive many generations of processor. From what I've heard so far, the current G5 is very quiet in operation.
What I'm suggesting is that we can't immediately assume the G5 is a heat-producing monster just because of the robust cooling system in the current model.
The case was probably designed with the future in mind. Not to mention, in a 'fully loaded' desktop system, there's going to be many other heat sources (HDDs, optical drives, high-end graphics cards etc.)
Anyway - just some random thoughts to factor in to the rumor mill ...
The case design will no doubt outlive many generations of processor. From what I've heard so far, the current G5 is very quiet in operation.
What I'm suggesting is that we can't immediately assume the G5 is a heat-producing monster just because of the robust cooling system in the current model.
The case was probably designed with the future in mind. Not to mention, in a 'fully loaded' desktop system, there's going to be many other heat sources (HDDs, optical drives, high-end graphics cards etc.)
Anyway - just some random thoughts to factor in to the rumor mill ...
Pipeline stages......
What blows my mind is that in reading the specs of the new G5, there is 23 (Right?) stages in the instruction pipeline. When the G4 was Apples hottest thing on the block, they used comparisons between the P4's pipeline stages (20 or 21) and the 7 that the G4 has as a means of "proving" the g4 is more efficient per clock cycle.....it seems that this argument has been thrown out the door with the G5, as it now has more pipeline stages and a lower clock speed than the P4. So whats up with that? Did they just say "screw it, we need more perceived speed" and increase the pipeline stages to reach a higher mhz rating?
Take the current Gobi (PPC 750GX) which is now sampling...... only 5 pipeline stages, yet will clock to 1.1ghz....... forgetting altivec for a moment, does it make sense that the 750GX is more efficient per clock cycle than the G5? Yes the G5 has got a hell of a fast bus between the RAM and the CPU, but the 1.1ghz Gobi has a 1mb of L2 cache running at 1.1ghz (1:1). If the 750VX ever does make it out (Which will be 750GX @90nm with SIMD), who in here would still take a lower clocked G5 (in a powerbook) over a 750VX in, say, an Ibook......i know where i'd be plunkin' down my cash....which is to say that maybe they would never put that much power in a consumer machine that could really be competitive with the G5.
Seeya
p9
What blows my mind is that in reading the specs of the new G5, there is 23 (Right?) stages in the instruction pipeline. When the G4 was Apples hottest thing on the block, they used comparisons between the P4's pipeline stages (20 or 21) and the 7 that the G4 has as a means of "proving" the g4 is more efficient per clock cycle.....it seems that this argument has been thrown out the door with the G5, as it now has more pipeline stages and a lower clock speed than the P4. So whats up with that? Did they just say "screw it, we need more perceived speed" and increase the pipeline stages to reach a higher mhz rating?
Take the current Gobi (PPC 750GX) which is now sampling...... only 5 pipeline stages, yet will clock to 1.1ghz....... forgetting altivec for a moment, does it make sense that the 750GX is more efficient per clock cycle than the G5? Yes the G5 has got a hell of a fast bus between the RAM and the CPU, but the 1.1ghz Gobi has a 1mb of L2 cache running at 1.1ghz (1:1). If the 750VX ever does make it out (Which will be 750GX @90nm with SIMD), who in here would still take a lower clocked G5 (in a powerbook) over a 750VX in, say, an Ibook......i know where i'd be plunkin' down my cash....which is to say that maybe they would never put that much power in a consumer machine that could really be competitive with the G5.
Seeya
p9
I believed it could all someday be true, then you had to break my suspension of disbelief by saying 2-button trackpad. Then I knew it was just a fantasy.
One of things that keeps me from buying an Apple laptop is their insistence on relying on 1984 mouse technology. On the desktop I can simply replace the mouse, but with a laptop I'm stuck.Re: Pipeline stages......
If you read the discussion of the G5 design by Hannibal of ArsTechnica, he referred to the G4 as "wide and shallow", the P4 as "narrow and deep", and the G5 as "wide and deep". Basically, the argument that the G4 is more efficient per clock doesn't have a lot to do with the pipleline, though the deep pipeline of the P4 combined with the "narrowness" of the design is a weakness. It's why the G5 destroyed it in the WWDC demos. P4s choke on non-optimised code. Hannibal went into detail about why the G5 is less vulnerable.
If you read the discussion of the G5 design by Hannibal of ArsTechnica, he referred to the G4 as "wide and shallow", the P4 as "narrow and deep", and the G5 as "wide and deep". Basically, the argument that the G4 is more efficient per clock doesn't have a lot to do with the pipleline, though the deep pipeline of the P4 combined with the "narrowness" of the design is a weakness. It's why the G5 destroyed it in the WWDC demos. P4s choke on non-optimised code. Hannibal went into detail about why the G5 is less vulnerable.
You forgot one other feature, the small tube on the side that a hair dryer can be inserted in and put on "air only" to aid in cooling the beast when you really are using it hard.lol
if they could, would they lower the amount of pipeline stages in the G5? how long would it take to do that?
3 month upgrade cycle
What Apple needs to do is continually be at work and incrementally upgrade the components/systems of the Macs being sold within a given model. Apple attaches more significance to the changing of a case, excuse me, enclosure, than most anyone else. It is the technology inside that counts most and the functionality of the case should be a priority instead of merely "style". There are many "stylish" products that do not work well.
When components change within the industry they should simply be incorporated into the shipping product. Waiting (and waiting is what Apple has done) to incorporate them in a new "model" is counterproductive.
What Apple needs to do is continually be at work and incrementally upgrade the components/systems of the Macs being sold within a given model. Apple attaches more significance to the changing of a case, excuse me, enclosure, than most anyone else. It is the technology inside that counts most and the functionality of the case should be a priority instead of merely "style". There are many "stylish" products that do not work well.
When components change within the industry they should simply be incorporated into the shipping product. Waiting (and waiting is what Apple has done) to incorporate them in a new "model" is counterproductive.
Number of pipeline stages tends to creep up over time, not down. In general, more pipeline stages are added to enable higher clock speeds. It would be wonderful to have a 1-stage design (i.e., no pipeline at all), which would be wickedly simple. Unfortunately, it'd be essentially impossible to make it go very fast, which is why you won't find a high-performance processor designed this way.
IBM would not have added any more stages to the 970 then they found necessary to make it work at the desired speeds. After having gone to the considerable (!) effort of implementing it like that, they'd be unlikely to then make a specific effort to shorten the pipelines on the 970. With each new generation, though (980, 990, etc.) the pipeline design will get revisited, so they could conceivably have shorter pipelines.
At this point, the die is cast with the 970. Though it definitely does have very long pipelines, it also has a heck of a lot of impressive hardware in there to mitigate the effects of that. It will be interesting to see what the 980 looks like; maybe there'll be some details at MPF when IBM presents the Power5.
Re: 3 month upgrade cycle
As the beer commercial says, "True."
Of course, Apple includes most "components" that change on the motherboard. So most of the time they have to make a new motherboard anyway. Why not wait and do a few different components at once and release a new model? Especially when you have to add support for the new tech in the OS anyway.
I prefer it RBR2's way, but I suspect my version is how Apple operates.
As the beer commercial says, "True."
Of course, Apple includes most "components" that change on the motherboard. So most of the time they have to make a new motherboard anyway. Why not wait and do a few different components at once and release a new model? Especially when you have to add support for the new tech in the OS anyway.
I prefer it RBR2's way, but I suspect my version is how Apple operates.
Exactly
It is far more expensive for Apple to make a lot of little revs to the mlbs than one huge rev to the mlb, that's the reason for distanced updates.
Jaedreth
It is far more expensive for Apple to make a lot of little revs to the mlbs than one huge rev to the mlb, that's the reason for distanced updates.
Jaedreth
sounds good. IBM's sure got a good timeline for the development of the G5 and future chips for Apple.
and altivec2 requires the use of a 65nm process!! that's freakin' awesome!!
and altivec2 requires the use of a 65nm process!! that's freakin' awesome!!
Makes sense...
This corroborates Steve's (in)famous off-stage-but-on-mic comment at WWDC that they'll be at 3GHz by December.
This corroborates Steve's (in)famous off-stage-but-on-mic comment at WWDC that they'll be at 3GHz by December.
No, that's what he said on-stage. I'm talking about what he said off-stage in a private conference while they were doing the sound checks on his microphone.
Not surprised if IBM bought AMD...
http://www.theregister.co.uk/content/3/32162.html
Check this out.
Jaedreth
http://www.theregister.co.uk/content/3/32162.html
Check this out.
Jaedreth
I'm just doing the 90nm happy dance. If IBM can get the processes down quickly, I'll be a very happy man.
or another possibility is that altivec is optimized for 32-bit and altivec 2 is optimized for 64-bit.