These posts are full of people espousing why they are justified in waiting for the next big thing be it Montevina, Nehalem, etc. I just want to give everyone an unofficial road map so that you know what the hell you're even waiting for! This all refers to the Intel MOBILE road map.
First, a clarification to the newbies - There are two components to the motherboard, the CPU and the Motherboard Chipset. The CPUs will only work in certain chipsets but there is overlap between them. Also, the chipset is based on the microarchitecture. The current microarchitecture (for the last few years) has been "Core" microarchitecture. Nehalem is the next generation microarchitecture, and Sandy Bridge is the microarchitecture successor to Nehalem.
Note: Nehalem is an exception in the naming scheme in that it refers to both a processor (Clarksfield, Auburnsdale), a chipset (Calpella), and a microarchitecture (Nehalem). Most people refer to it's chipset properties though when mentioning it.
Second Note: To be extremely accurate, the chipsets I've noted are actually called platforms - ie. Santa Rosa platform, Montevina platform, Calpella platform, etc. A platform has three components - the CPU, the motherboard chipset, and the wireless network interface. But for layman's usage of these terms most people use the motherboard chipset name (Cantiga) as the platform name (Montevina), which while not correct is the way it is used on these forums so I've done the same thing here. The problem comes when discussing future platforms (of which there may be one large one - notably Calpella, which is based on Nehalem processors), but which may have multiple motherboard chipsets (currently unknown names of future chipsets but there are likely others coming in the future).
CPUs (in order of introduction):
Merom (65nm):
Fits in Santa Rosa Chipset
Designed for processing power
Penryn (45nm):
Fits in Santa Rosa, Montevina, and Nehalem Chipsets
Designed for power efficiency
Features:
-Support for SSE4 instruction set (beneficial for media applications that support this (video encoding work, etc))
-5-15% performance increase over Merom
-Lower power consumption = More battery life
-Higher L2 Cache on certain chips
Nehalem (45nm): Due in Q2 '09
Fits in Nehalem Chipset
Designed for processing power (see below for details)
Specific Chip Features:
-2nd Generation Penryn Processors in some senses
-Auburnsdale Chip- Dual-Core, 4MB L2 Cache, 35-45W TDP
-Clarksfield Chip - Quad-Core, 8MB L2 Cache, 45-55W TDP
Westmere (32nm), formerly known as Nehalem-C: Due in 2009
Fits in Nehalem, Sandy Bridge Chipsets
Details unknown currently
Designed for power efficiency
Features:
-Basically like the Merom->Penryn evolution in that it is smaller and more power efficient with minor speed increases
Future 22nm chip (unnamed, but Sandy Bridge (also a chipset) is a common term used to refer to it): Due in 2010
Fits in Sandy Bridge Chipset
Details unknown currently
Likely designed for power efficiency
Features:
-4-8 Cores, but possibly up to 32 cores
-Speeds up to 4GHz
-L1, L2, and L3 cache
Chipsets (in order of introduction), or more properly, platforms:
Santa Rosa
Based on "Core" microarchitecture
Utilizes Crestline chipset
4th Generation Centrino Platform
Will hold Merom and Penryn CPUs
Montevina : Due in Q2-Q3 '08
Based on "Core" microarchitecure
Utilizes Cantiga chipset
5th Generation Centrino Platform
Will hold Penryn CPUs
Features:
-Supports Penryn processors up to 3.06 GHz
-Lower power requirements
-1066MHz FSB (compared to 800MHz for Santa Rosa)
-DDR3 RAM clocked up to 1066MHz (compared to DDR2 up to 667MHz on Santa Rosa)
-Support for intel turbo memory (optional on Santa Rosa)
-Onboard gigabit ethernet
-WiMax
Calpella: Due in Q2 '09 (with introduction of new chips)
This is what most people are referring to when they say they are waiting for Nehalem!
Based on "Nehalem" microarchitecture of CPUs
Utilizes an unnamed chipset
6th Generation Centrino Platform
Will hold Nehalem and possibly Westmere CPUs (but newer chipsets may need to be developed to hold Westmere CPUs)
Features:
-Calpella is designed for raw processing power - early benchmarks have seen 100-200% improvements in speed over today's processor+chipset combinations
-FSB replaced with "Intel Quick Path Interconnect" which connects CPU and RAM directly
-Supports DDR3 RAM up to 1600MHz - important because a major bottleneck in current systems is the FSB which connects the RAM and CPU. The Nehalem boards seems to eliminate that bottleneck based off of the design and the RAM speeds will likely actually be noticeable and contribute to performance (whereas nowardays they do absolutely nothing for the most part)
-Native support for Blu-Ray (and video encoding/decoding tasks)
-Native support for SSDs, hybrid drives
-WiMax
-Nehalem chips may features 1-8 cores but Calpella supported Nehalem chips will support 2-4 cores as of right now.
Sandy Bridge (No chipset names are known as of now, this is the name of the underlying microarchitecture, but commonly people use this name to describe the chip as well (incorrectly)):
The successor to the Nehalem microarchitecture chipsets
Sandy Bridge Chipset to support 32nm chips: Due in 2010
Sandy Bridge Chipset to support 22nm chips: Due in 2011
No other details known
If there are corrections to be made please write them down in the post and I will keep this list accurate (or as accurate as it can possibly be) but add a link to your sources so I can verify them.
First, a clarification to the newbies - There are two components to the motherboard, the CPU and the Motherboard Chipset. The CPUs will only work in certain chipsets but there is overlap between them. Also, the chipset is based on the microarchitecture. The current microarchitecture (for the last few years) has been "Core" microarchitecture. Nehalem is the next generation microarchitecture, and Sandy Bridge is the microarchitecture successor to Nehalem.
Note: Nehalem is an exception in the naming scheme in that it refers to both a processor (Clarksfield, Auburnsdale), a chipset (Calpella), and a microarchitecture (Nehalem). Most people refer to it's chipset properties though when mentioning it.
Second Note: To be extremely accurate, the chipsets I've noted are actually called platforms - ie. Santa Rosa platform, Montevina platform, Calpella platform, etc. A platform has three components - the CPU, the motherboard chipset, and the wireless network interface. But for layman's usage of these terms most people use the motherboard chipset name (Cantiga) as the platform name (Montevina), which while not correct is the way it is used on these forums so I've done the same thing here. The problem comes when discussing future platforms (of which there may be one large one - notably Calpella, which is based on Nehalem processors), but which may have multiple motherboard chipsets (currently unknown names of future chipsets but there are likely others coming in the future).
CPUs (in order of introduction):
Merom (65nm):
Fits in Santa Rosa Chipset
Designed for processing power
Penryn (45nm):
Fits in Santa Rosa, Montevina, and Nehalem Chipsets
Designed for power efficiency
Features:
-Support for SSE4 instruction set (beneficial for media applications that support this (video encoding work, etc))
-5-15% performance increase over Merom
-Lower power consumption = More battery life
-Higher L2 Cache on certain chips
Nehalem (45nm): Due in Q2 '09
Fits in Nehalem Chipset
Designed for processing power (see below for details)
Specific Chip Features:
-2nd Generation Penryn Processors in some senses
-Auburnsdale Chip- Dual-Core, 4MB L2 Cache, 35-45W TDP
-Clarksfield Chip - Quad-Core, 8MB L2 Cache, 45-55W TDP
Westmere (32nm), formerly known as Nehalem-C: Due in 2009
Fits in Nehalem, Sandy Bridge Chipsets
Details unknown currently
Designed for power efficiency
Features:
-Basically like the Merom->Penryn evolution in that it is smaller and more power efficient with minor speed increases
Future 22nm chip (unnamed, but Sandy Bridge (also a chipset) is a common term used to refer to it): Due in 2010
Fits in Sandy Bridge Chipset
Details unknown currently
Likely designed for power efficiency
Features:
-4-8 Cores, but possibly up to 32 cores
-Speeds up to 4GHz
-L1, L2, and L3 cache
Chipsets (in order of introduction), or more properly, platforms:
Santa Rosa
Based on "Core" microarchitecture
Utilizes Crestline chipset
4th Generation Centrino Platform
Will hold Merom and Penryn CPUs
Montevina : Due in Q2-Q3 '08
Based on "Core" microarchitecure
Utilizes Cantiga chipset
5th Generation Centrino Platform
Will hold Penryn CPUs
Features:
-Supports Penryn processors up to 3.06 GHz
-Lower power requirements
-1066MHz FSB (compared to 800MHz for Santa Rosa)
-DDR3 RAM clocked up to 1066MHz (compared to DDR2 up to 667MHz on Santa Rosa)
-Support for intel turbo memory (optional on Santa Rosa)
-Onboard gigabit ethernet
-WiMax
Calpella: Due in Q2 '09 (with introduction of new chips)
This is what most people are referring to when they say they are waiting for Nehalem!
Based on "Nehalem" microarchitecture of CPUs
Utilizes an unnamed chipset
6th Generation Centrino Platform
Will hold Nehalem and possibly Westmere CPUs (but newer chipsets may need to be developed to hold Westmere CPUs)
Features:
-Calpella is designed for raw processing power - early benchmarks have seen 100-200% improvements in speed over today's processor+chipset combinations
-FSB replaced with "Intel Quick Path Interconnect" which connects CPU and RAM directly
-Supports DDR3 RAM up to 1600MHz - important because a major bottleneck in current systems is the FSB which connects the RAM and CPU. The Nehalem boards seems to eliminate that bottleneck based off of the design and the RAM speeds will likely actually be noticeable and contribute to performance (whereas nowardays they do absolutely nothing for the most part)
-Native support for Blu-Ray (and video encoding/decoding tasks)
-Native support for SSDs, hybrid drives
-WiMax
-Nehalem chips may features 1-8 cores but Calpella supported Nehalem chips will support 2-4 cores as of right now.
Sandy Bridge (No chipset names are known as of now, this is the name of the underlying microarchitecture, but commonly people use this name to describe the chip as well (incorrectly)):
The successor to the Nehalem microarchitecture chipsets
Sandy Bridge Chipset to support 32nm chips: Due in 2010
Sandy Bridge Chipset to support 22nm chips: Due in 2011
No other details known
If there are corrections to be made please write them down in the post and I will keep this list accurate (or as accurate as it can possibly be) but add a link to your sources so I can verify them.
bu its going to hurt when I see the guy next to me with a Faster and Newer Macbook but until then Im not stopping showing off My Aluminium Macbook