Apple Chipmaker Discusses Highly Advanced 1.4nm Chips for First Time

[AppleFan1998]

Darn it, looks like I'll be waiting until 2027 for my next phone.

 

[Iwavvns]

Roughly sub-20 nm, it has been a concern for a while now.

Well, I hope they’re keeping a really sharp eye on that.

 

[eifelbube]

TSMC has officially mentioned its work on 1.4nm fabrication technology that is likely destined to underpin future Apple silicon chips.

In a slide (via SemiAnalysis's Dylan Patel) from its Future of Logic panel, TSMC disclosed the official name of its 1.4nm node for the first time, "A14." The company's 1.4nm technology is expected to follow its "N2" 2nm chips.

N2 is scheduled for mass production in late 2025, to be followed by an enhanced "N2P" node in late 2026. As a result, it is unlikely that any A14 chips will arrive before 2027.

Apple was the first company to utilize TSMC's 3nm technology with the A17 Pro chip in the iPhone 15 Pro and iPhone 15 Pro Max, and the company is likely to follow suit with the chipmaker's upcoming nodes. Apple's latest chip technology has historically appeared in the iPhone before making its way to the iPad and Mac lineups. With all of the latest information, here's how the iPhone's chip technology could look going forward:

• iPhone XR and XS (2018): A12 Bionic (7nm, N7)
• iPhone 11 lineup (2019): A13 Bionic (7nm, N7P)
• iPhone 12 lineup (2020): A14 Bionic (5nm, N5)
• iPhone 13 Pro (2021): A15 Bionic (5nm, N5P)
• iPhone 14 Pro (2022): A16 Bionic (4nm, N4P)
• iPhone 15 Pro (2023): A17 Pro (3nm, N3B)
• iPhone 16 Pro (2024): "A18" (3nm, N3E)
• "iPhone 17 Pro" (2025): "A19" (2nm, N2)
• "iPhone 18 Pro" (2026): "A20" (2nm, N2P)
• "iPhone 19 Pro" (2027): "A21" (1.4nm, A14)

The M1 series of Apple silicon chips is based on the A14 Bionic and uses TSMC's N5 node, while the M2 and M3 series use N5P and N3B, respectively. The Apple Watch's S4 and S5 chips use N7, the S6, S7, and S8 chips use N7P, and the latest S9 chip uses N4P.

Each successive TSMC node surpasses its predecessor in terms of transistor density, performance, and efficiency. Earlier this week, it emerged that TSMC had already demonstrated prototype 2nm chips to Apple ahead of their expected introduction in 2025.

Article Link: Apple Chipmaker Discusses Highly Advanced 1.4nm Chips for First Time

Surprised. I did not expect .x increments until after the 1nm happens …

 

[eifelbube]

TSMC has officially mentioned its work on 1.4nm fabrication technology that is likely destined to underpin future Apple silicon chips.

In a slide (via SemiAnalysis's Dylan Patel) from its Future of Logic panel, TSMC disclosed the official name of its 1.4nm node for the first time, "A14." The company's 1.4nm technology is expected to follow its "N2" 2nm chips.

N2 is scheduled for mass production in late 2025, to be followed by an enhanced "N2P" node in late 2026. As a result, it is unlikely that any A14 chips will arrive before 2027.

Apple was the first company to utilize TSMC's 3nm technology with the A17 Pro chip in the iPhone 15 Pro and iPhone 15 Pro Max, and the company is likely to follow suit with the chipmaker's upcoming nodes. Apple's latest chip technology has historically appeared in the iPhone before making its way to the iPad and Mac lineups. With all of the latest information, here's how the iPhone's chip technology could look going forward:

• iPhone XR and XS (2018): A12 Bionic (7nm, N7)
• iPhone 11 lineup (2019): A13 Bionic (7nm, N7P)
• iPhone 12 lineup (2020): A14 Bionic (5nm, N5)
• iPhone 13 Pro (2021): A15 Bionic (5nm, N5P)
• iPhone 14 Pro (2022): A16 Bionic (4nm, N4P)
• iPhone 15 Pro (2023): A17 Pro (3nm, N3B)
• iPhone 16 Pro (2024): "A18" (3nm, N3E)
• "iPhone 17 Pro" (2025): "A19" (2nm, N2)
• "iPhone 18 Pro" (2026): "A20" (2nm, N2P)
• "iPhone 19 Pro" (2027): "A21" (1.4nm, A14)

The M1 series of Apple silicon chips is based on the A14 Bionic and uses TSMC's N5 node, while the M2 and M3 series use N5P and N3B, respectively. The Apple Watch's S4 and S5 chips use N7, the S6, S7, and S8 chips use N7P, and the latest S9 chip uses N4P.

Each successive TSMC node surpasses its predecessor in terms of transistor density, performance, and efficiency. Earlier this week, it emerged that TSMC had already demonstrated prototype 2nm chips to Apple ahead of their expected introduction in 2025.

Article Link: Apple Chipmaker Discusses Highly Advanced 1.4nm Chips for First Time

Will the continued chip miniaturization make it possible to fit the AppleVision Pro tech into contact lenses? Wearing ski goggles is not my thing when i am not in the slopes … 😊

 

[Fitzman]

Apple's "A18" will be on N3P, not N3E, but otherwise the predicted iPhone sequence is as good a guess as we can make.

On TSMC's naming, just to be clear, the "A" stands for angstrom (10 angstrom = 1 nanometer) and should technically be an Å -- in the age of Unicode, there's no reason why TSMC can't simply use Å instead of A, but I suppose the marketing people objected to that. But we can hope that, when it's all official and not just a tech-conference slide for people who all know that A = Å, maybe TSMC will use Å instead of A...

I wanted to mention this respectful that I had seen an article earlier this month where tsmc had said that the N3E node was to be used for phones and hpc and the N3P node was for the other computing devices.

 

[128KMac]

7nm to 5nm = 28.6% decrease
5nm to 3nm = 40% decrease
3nm to 2nm = 33.3% decrease
2nm to 1.4nm = 30% decrease

Fairly consistent, but 3nm is the best node over node decrease. Really enjoying it in my M3 Max, which blasts through tasks quickly and then returns to being cool, quiet, and power efficient.



It's all relative to the node size, as the performance roughly follows the transistor density improvements and related power efficiency improvements. But there are a few big reasons:

1. They can keep making steady improvements each year while keeping their margins up. These are businesses, not charities. Perhaps if there were more competition, but there isn't. So here we are. Even so, these node performance increases are still pretty good compared to much of the 2010s.
2. We are almost at the end of Moore's Law regarding silicon. None of these silicon-based manufacturers are necessarily racing to pass that finish line first, because that means bad things for them if they don't have a replacement ready, such as graphene or a fundamentally new transistor design.
3. I'm not 100% sure on this one, but I'm pretty sure they set up factories or various lines within factories well in advance. You're talking many years of development for each process change, from prototyping to Engineering Validation Testing to Design Validation Testing to Production Validation Testing and then ramping up for production. As each new process change is drawn up and tested in a lab, they get passed to teams for implementation and there are a lot of phases to get it ready for production. So there is always a team working on the next step for implementation, which is probably why this 1.4nm stuff is leaking now. It's probably out of the lab and a lot more people are learning about it since they need to put it into production and start building specialized equipment and tools for creating the new wafers.

Behind the scenes there is a lot of work being done to research new methods for post-silicon. I'm sure the major chip companies have invested a lot of time and money into researching the post-silicon world, and there are radically new types of computers being developed at large companies, such as quantum computers, though those aren't great for general computing and currently require a lot of heavy duty equipment for supercooling, etc. For silicon, from 1.4nm down to some multiple of the width of a silicon atom (0.2nm) they've got it figured out. But I don't think anyone has made a transistor smaller than 1nm yet, including in a lab (at least that is publicly known), and to minimize quantum effects, it's theorized the gate width needs to be larger than 0.2nm, and gate width is what I believe TSMC's node naming refers to. So probably the smallest is in the 0.4nm to 0.6nm range.

For that reason, I see these as what we will potentially see for future nodes below 2nm. It gets tricky, because I think the gate width needs to be in multiples of 0.2nm, because that's the width of a silicon atom.

• 1.4nm (2027, 30% decrease)
• 1nm (2029, we have seen this in a lab, 28.6% decrease)
• 0.6nm (2031, might be 0.8nm to stretch things out if needed, but that would only be 20% decrease, this is 40% decrease)
• 0.4nm (2033, 33.3% decrease, this size might not be possible)

These are all numbers we've seen at the very beginning of my post: 30%, 28.6%, 40%, 33.3%, so I think these are likely targets we could see and stay within the range they've recently been doing. This should get us through probably 2032 on A6+, maybe through 2034 if A4+ is possible, and I think by then it's pretty likely there will be a replacement for silicon ready.

I'm no expert, but I keep reasonably up to date about what is happening in these areas so if anyone has more detailed or recent information, please correct this post! I'm basically trying to ballpark about how many years we have left on silicon and I think it's in the 8-10 years range. Obviously silicon chips will exist far beyond that for simpler applications, but I'm talking about the cutting edge, high end chips only.

Thanks for actual useful information.

 

[Chuckeee]

7nm to 5nm = 28.6% decrease
5nm to 3nm = 40% decrease
3nm to 2nm = 33.3% decrease
2nm to 1.4nm = 30% decrease

Could be but possibly not because:

Those labels are often referred to as just “marketing terminology” and are not reflective of specific dimension within the chip structure

Or

Those are linear measurements and chip density would be base on area (so it would be the square of those values)

 

[svish]

1.4nm chips are some time away. Macs with 1.4nm chips will take even longer to hit the market

 

[wikiverse]

You just convinced me to wait for the iPhone 19. On second thought i'll wait for the iPhone 21 just so they can iron out all the bugs. 😜

You joke, but I just bought a 15 Pro, which was an upgrade from the 8, which was an upgrade from the 5. So based on my upgrade schedule, the 21 Pro will be my next phone unless the 15 lasts longer than 6 years without the running slow or the battery crapping itself completely.

 

[tenthousandthings]

I wanted to mention this respectful that I had seen an article earlier this month where tsmc had said that the N3E node was to be used for phones and hpc and the N3P node was for the other computing devices.

I'm not sure what article you mean, I must have missed it, but I think you might be referring to this, on page 5:

https://investor.tsmc.com/english/encrypt/files/encrypt_file/reports/2023-07/7ec677062ca442e429b632ccd6d4f31ad53b1ce7/TSMC%202Q23%20Transcript.pdf

C.C. Wei is talking about both N3 (N3B) and N3E when he mentions "both HPC and smartphone" demand repeatedly. I don't think they mention N3P, but we know what N3P is, it's an optical shrink of N3E. See here:

TSMC Details 3nm Evolution: N3E On Schedule, N3P and N3X To Deliver 5% Performance Gains

www.anandtech.com

N3E and N3P have the same uses, N3P is a refinement of N3E.

The outlier is N3X, which has too much power leakage (+250%!) for Apple to use in their products. So maybe that's what you're thinking of?

 

[Fitzman]

I'm not sure what article you mean, I must have missed it, but I think you might be referring to this, on page 5:

https://investor.tsmc.com/english/encrypt/files/encrypt_file/reports/2023-07/7ec677062ca442e429b632ccd6d4f31ad53b1ce7/TSMC%202Q23%20Transcript.pdf

C.C. Wei is talking about both N3 (N3B) and N3E when he mentions "both HPC and smartphone" demand repeatedly. I don't think they mention N3P, but we know what N3P is, it's an optical shrink of N3E. See here:

TSMC Details 3nm Evolution: N3E On Schedule, N3P and N3X To Deliver 5% Performance Gains

www.anandtech.com

N3E and N3P have the same uses, N3P is a refinement of N3E.

The outlier is N3X, which has too much power leakage (+250%!) for Apple to use in their products. So maybe that's what you're thinking of?

I'm typing on my phone but this picture is of the article I'm referring to that was posted on Dec 6th, 2023. I totally agree that Apple won't use N3X so I'm saying that more than likely for the M4 lineup that they'd use the N3P node and the Iphone 16's A18 chip being on N3E.

 

[tenthousandthings]

I'm typing on my phone but this picture is of the article I'm referring to that was posted on Dec 6th, 2023. I totally agree that Apple won't use N3X so I'm saying that more than likely for the M4 lineup that they'd use the N3P node and the Iphone 16's A18 chip being on N3E.

Okay, got it — I thought you meant that TSMC said N3P wasn’t for smartphones. Which I hadn’t heard and I didn’t think could possibly be something they’d said.

I still think A18 will be on N3P. We know from past history that when TSMC says what they’re saying about when it will be ready (2H 2024) that means Apple plans to use it. That’s what happened with the A16 on N4P. I don’t know what to think about M4 — it will be interesting to see what they do with that.

 

[Fitzman]

Okay, got it — I thought you meant that TSMC said N3P wasn’t for smartphones. Which I hadn’t heard and I didn’t think could possibly be something they’d said.

I still think A18 will be on N3P. We know from past history that when TSMC says what they’re saying about when it will be ready (2H 2024) that means Apple plans to use it. That’s what happened with the A16 on N4P. I don’t know what to think about M4 — it will be interesting to see what they do with that.

I mean it's still a year away so I mean it could be a possibility. I didn't realize that about the A16 being on N4P. I only slightly pay attention to iPhone for my dad but I mainly focus on Apple for the MBP.

 

[Brien]

Roughly sub-20 nm, it has been a concern for a while now.

What is post 1.4, I wonder?

 

[tenthousandthings]

What is post 1.4, I wonder?

1.0nm A10 (Å10), by 2030. At the IEEE-IEDM conference in December, a panel presentation used a slide charting TSMC’s “System Scaling Innovation” that indicates A10 will
follow A14.

https://ir.appliedmaterials.com/static-files/639a1bf1-ecab-4fbf-9ae0-cd5b5bfa77c0

This was widely reported as an official TSMC slide, which I don’t think it is. Nonetheless, it is accurate, a TSMC executive (see the last slide) was part of the panel and must have contributed the information, but those dates of 2027 for A14 and 2030 for A10 are not an official announcement by TSMC.

 

[tenthousandthings]

1.0nm A10 (Å10), by 2030. At the IEEE-IEDM conference in December, a panel presentation used a slide charting TSMC’s “System Scaling Innovation” that indicates A10 will
follow A14.

https://ir.appliedmaterials.com/static-files/639a1bf1-ecab-4fbf-9ae0-cd5b5bfa77c0

This was widely reported as an official TSMC slide, which I don’t think it is. Nonetheless, it is accurate, a TSMC executive (see the last slide) was part of the panel and must have contributed the information, but those dates of 2027 for A14 and 2030 for A10 are not an official announcement by TSMC.

UPDATE: Interestingly, the PDF of the slide presentation available online has recently been edited to remove all references to A14 and A10. The above link is still valid, but it now leads to a "FINAL2" version instead of the original version used at the presentation...

This doesn't change anything, it just means TSMC wants to keep their marketing/naming options open.

 

[Reason077]

This doesn't change anything, it just means TSMC wants to keep their marketing/naming options open.

Or it could have something to do with the process naming confusingly overlapping/conflicting with the chip names of one of TSMC's largest customers? I mean, they could have chosen any other letter to differentiate it from "N". Why "A"?

 

[Chuckeee]

Or it could have something to do with the process naming confusingly overlapping/conflicting with the chip names of one of TSMC's largest customers? I mean, they could have chosen any other letter to differentiate it from "N". Why "A"?

A is for Angstrom and N was for Nanometer.

But for these chips, these are not associated with actual physical measurements instead, they just represent marketing terms for something small, and then something even smaller