It would be mildly intriguing to build the ability to read/run RISC-V code into their existing ARM-based CPUs (basically as a hardware front-end processor / translator), though I’m not sure what benefit it might bring to their long game. But, might be moving chess pieces around to handle some future possible scenario.
Maybe something oddball like governments decree that smart cars must run RISC-V code so they can all run some government approved safety modules.
Would make much more sense to just have Rosetta 3 do code translation.