Apple Shares Compatibility Details for Mac Pro's New Radeon Pro W6000 Graphics

[deconstruct60]

I really wish Apple would adopt PCIe 5 sooner rather than later. Same with Thunderbolt. I know that that depends on Intel, but I’m sure Apple holds a lot of sway

PCI-e v5 solves what for Apple's laptops? Apple is completely committed to entirely removing all dGPUs from their laptop line up ( probably done by the end of this year). So what is PCI-e v5 going to by there? PCI-e v5 for the "internal SSD" probably not. Apple isn't even at v4 there.

on the iMac 24" what is it buying there? Again not buying much.

on the iMac "larger screen"... is that really going to be hugely deatched from the iMac 24"? Probably not.

Is PCI-e v5 hugely more power efficient than PCI-e v3. Not really. So Apple's "job #1 save power" isn't a big win there either.

Are there a whole slew of 100GbE cards for Macs? Nope.

Apple may eventually get to PCI-e v5... but they are seriously unlikely not early adopters. All the more so with their hugely dragging their feet on 3rd party dGPUs (and things like CXL ) .

As far as Thunderbolt goes... they have Thunderbolt 3.

Apple huge quest to conquer mid-upper range dGPUs with their iGPUs is probably at odds with aggressively perusing the ramp in PCI-e v5. ( more memory I/O is competing with more PCI-e I/O for outer edge die space and power. Any priority "tie breakers there" probably go Woldn't be surpising if it took to 3rd generation M-series just to get to PCI-e v4.

Intel is moving at an accelerated pace in part because they are behind the curve elsewhere in the CPU package so it is a "checklist feature" they can compete on. It is also their path to "shared memory" via CXL path to modules ( whereas AMD is going to lean more on Infinity Fabric and Nvidia on NVLink. ) Apple is probably not keen on "sharing" with anybody.

 

[deconstruct60]

Me- Geeze, can they make their stuff any more proprietary?

Apple- "Hold my sippy cup of juice"

Pretty good chance this isn't Apple. AMD's RDNA MI100 using a different implementation of Infinity Fabric than the Vega's did.

"... 2nd Gen Infinity Architecture ...
... "
https://www.amd.com/en/products/server-accelerators/instinct-mi100

MI100's pair up with other MI100's . If the Infinity fabric has to "flow negotiate" that makes the logic more complicated. You don't "mix and match" EPYC generation pairings either.

This is what function over form is all about. These may look similar but the function they need to perform to rigis specs is different.


As MPX modules though, there is nothing new or incompatible here. You can put a Vega Pro II in bay 2 and a 6000 series MPX module in bay 1. That works. Just can't hook them together the "back channel". They are two generations apart GPU design. Shouldn't be all that surprising.

 

[Sevenfeet]

PCI-e v5 solves what for Apple's laptops? Apple is completely committed to entirely removing all dGPUs from their laptop line up ( probably done by the end of this year). So what is PCI-e v5 going to by there? PCI-e v5 for the "internal SSD" probably not. Apple isn't even at v4 there.

on the iMac 24" what is it buying there? Again not buying much.

on the iMac "larger screen"... is that really going to be hugely deatched from the iMac 24"? Probably not.

Is PCI-e v5 hugely more power efficient than PCI-e v3. Not really. So Apple's "job #1 save power" isn't a big win there either.

Are there a whole slew of 100GbE cards for Macs? Nope.

Apple may eventually get to PCI-e v5... but they are seriously unlikely not early adopters. All the more so with their hugely dragging their feet on 3rd party dGPUs (and things like CXL ) .

As far as Thunderbolt goes... they have Thunderbolt 3.

Apple huge quest to conquer mid-upper range dGPUs with their iGPUs is probably at odds with aggressively perusing the ramp in PCI-e v5. ( more memory I/O is competing with more PCI-e I/O for outer edge die space and power. Any priority "tie breakers there" probably go Woldn't be surpising if it took to 3rd generation M-series just to get to PCI-e v4.

Intel is moving at an accelerated pace in part because they are behind the curve elsewhere in the CPU package so it is a "checklist feature" they can compete on. It is also their path to "shared memory" via CXL path to modules ( whereas AMD is going to lean more on Infinity Fabric and Nvidia on NVLink. ) Apple is probably not keen on "sharing" with anybody.

I agree with most of this. Right now, PCIe 5 doesn't matter for most consumers since PCI 4 is just getting started in this space. The next Mac Pro does present a unique opportunity though. What if you can design your own PCIe 5 controller on a 3-4 nm chip that you are already building? What if it fit nicely into bandwidth hungry things you know you're going to be doing like Thunderbolt 5, or any custom ASIC PCI slot solutions like a successor to Afterburner, or other possibilities? (a dedicated Neural Engine card compatible with existing APIs could have tremendous applications in scientific fields) And once you do it, you'll have class leading architecture for many years.

Now I think its far more likely than this new Mac Pro is PCIe 4....the current M1 Macs already are. But hope springs eternal.

 

[hashbreaker2021]

Can I then run 1 monitor at 1080p@960 Hz? Is scrolling then fluent?

That seems unlikely. As far as I know, 480Hz monitors have only just been announced by AUO and LG but supposedly are not due to ship until 2023 (e.g. hhttps://hexus.net/tech/news/monitors/148148-auo-lg-preparing-480hz-refresh-display-panels/ ) As it stands, even 360Hz displays are still relatively uncommon, so I am guessing that displays which can handle 960Hz are a ways off. I guess it could also be noted that monitor models offer 960Hz emulation modes, e.g. Samsung CMR 960 and Sony XR 960.

I do not have any of the requisite equipment to perform such tests though and this is mostly based off of conjecture, so YMMV.

 

[deconstruct60]

I agree with most of this. Right now, PCIe 5 doesn't matter for most consumers since PCI 4 is just getting started in this space. The next Mac Pro does present a unique opportunity though. What if you can design your own PCIe 5 controller on a 3-4 nm chip that you are already building? What if it fit nicely into bandwidth hungry things you know you're going to be doing like Thunderbolt 5, or any custom ASIC PCI slot solutions like a successor to Afterburner, or other possibilities? (a dedicated Neural Engine card compatible with existing APIs could have tremendous applications in scientific fields) And once you do it, you'll have class leading architecture for many years.

Thunderbolt 5 doesn't need PCI-e v5. Mostly likely TBv5 would be used to transport PCI-e v4. Same x4 lane provisioning to TB controller just shifting from PCI-e v3 worth to PCI-e v4 worth. ( i.e. going from 32Gb/s to 64Gb/s and staying under 40 and 80 Gb/s respectively).

The counter indicator is that Apple is rolling Thunderbolt down into the iPads. Just TBv3 is a huge jump there. And Apple can do it with lower power as progress with fab shrinks if don't chase the PCI-e bandwidth evolution on the bleeding edge.

There will probably be some pressure on Apple's systems as x4 PCI-e v4 M.2 SSDs go more mainstream. But x4 lane allocation isn't buy much in the big add-in-card space.

It would be nice if Apple modularized their internal chiplet/tile infrastructure so that a "PCI-e v4 controller" could be slid into a more largely differentiated Mac Pro package. But what Apple has done to the iMac ( used the M1 to 'thin out' the system) is applied to the rest of the desktop line up over time... Apple is probably not running for max PCI-e evolution. One of the large number of card to fill up the current 8 slot Mac Pro was Audio cards.. Those cards don't need PCI-e v3 let along PCI-e v4 or 5.

Afterburner ... more a candidate to put into the SoC as fixed function logic with the transistor budget increased at 3 - 2 nm.

Chasing scientific fields? Is Apple even contemplating putting ECC on the SoC ?

Now I think its far more likely than this new Mac Pro is PCIe 4....the current M1 Macs already are. But hope springs eternal.

Where is the indicators that M1 isn't PCIe -v3 ? (there were some initial launch articles that tossed around TBv4 (which it isn't ) and PCI-e v4 ( MBA Air SSD getting faster is just removing throttling) ).

 

[Gnattu]

Where is the indicators that M1 isn't PCIe -v3

You are getting it wrong. The M1's SSD does not use PCIe at all, the controller is integrated in the SoC and work like a coprocessor, the SoC exposes am MMIO region which is basically an nvme BAR, which interacts with the nvme driver directly.

Similar goes for the Thunderbolt, although M1 provides 2 PCIe Gen3 x4 downstream ports, the upstream ports shows up in ioreg are PCIe 2.0x16, which is really strange.

M1 has 3 (observable) PCIe Gen4 x1 ports, but they are only used to communicate with Ethernet, USB 3.0 Controller and Wi-Fi, which are basically PCIe 2.0 devices. ioreg shows the port is capable of 16 GT/s x1 data rate which is a Gen4 speed.

Apple also mentioned it in the M1 launch keynote:

 

[deconstruct60]

You are getting it wrong. The M1's SSD does not use PCIe at all, the controller is integrated in the SoC and work like a coprocessor, the SoC exposes am MMIO region which is basically an nvme BAR, which interacts with the nvme driver directly.

I know the SSD controller is integrated, but folks have pointed at the SSD.

Similar goes for the Thunderbolt, although M1 provides 2 PCIe Gen3 x4 downstream ports, the upstream ports shows up in ioreg are PCIe 2.0x16, which is really strange.

I think "upstream" ports being PCI-e v2 is along the lines of what I was getting at. Internal to the die they may prefer slower and wider to move data as a better match to their internal bus network that doesn't put high demands on the bus. x16 would mean they have headroom to keep going even if there is a bump to Thunderbolt provisioning later.

But Thunderbolt until there is a major upgrade they take up isn't looking toward anything more than x4 PCI-e v3.

M1 has 3 (observable) PCIe Gen4 x1 ports, but they are only used to communicate with Ethernet, USB 3.0 Controller and Wi-Fi, which are basically PCIe 2.0 devices. ioreg shows the port is capable of 16 GT/s x1 data rate which is a Gen4 speed.

When most folks on the forums are looking for PCI-e v5 what they usually mean is some thing like x4 or x16 PCI-e v5. Applying it just to x1 links is very suggestive that Apple isn't using v4 here to increase bandwidth. Pretty good chance the higher priority here is lowering the number of PCI-e lanes coming off the die. Mostly so they can apply more outgoing lanes off the die to memory channels.

old iMac 21.5" with a i3-8100

CPU x16 PCI=e v3 aggregate bandwidth out. chipset hands out a x4 DMI worth of bandwidth from CPU so pragmatically another x4 . so x20 PCI-e v3 which is approximately 160Gb/s aggregate.

M1
two x4 PCI-e v3 via Thunderbolt. So about 64Gb/s
3 x1 PCie- v4 . So another 48 Gb/s So a grand total of 114Gb/s

so an overall net aggregate bandwidth decrease of 48 Gb/s ( in terms of PCI-e v4 that is x3 down. Or x6 down in terms of PCI-e v3 lanes. )

When Apple goes out ot provision a discrete 10GbE controller with one lane of PCI-e v4 instead of two lanes of v3, that is not what most folks are looking forward to. Dropping lane counts as increase PCI-e lane bandwidth doesn't bring next increases in bandwidth.

Apple also mentioned it in the M1 launch keynote:

View attachment 1815414

Thanks, I had missed that earlier. That appears to be more about better Perf/Watt by chopping down lanes. Same (or lower bandwidth) with less power cranks up pref/watt, but does nothing for overall performance. Nice marketing sizzle for them though.

If the primary use though is to go backwards on lane count, then that isn't a very promising path for add-in cards that a pushing the upper tiers of bandwidth.