Uhm. I’m really sorry to say but you’re just wrong here.
Integrated memory is absolutely built onto the same wafer as the rest of the SoC. Multiple copies of the SoC are printed onto the wafer which is then cut into a single die for each chip.
There is often confusion about the use of the term die when discussing system on a chip design. As traditionally each die had a specialized purpose where as now the same die houses components serving multiple discrete purposes but more tightly integrated (removing the waste of copper interconnects/silicon wafers etc that a longer traversal to a separate SoC would require.
Testing these complex arrays of components requires more of a hybrid / real life simulation to suss out the most insidious of errors that can occur with poor yield quality.
No, you are wrong. In all of Apple’s A-series processors, and in the die photo that has been circulating of the M1, there is no RAM on the SoC die. The RAM is on separate die, in the same SoC package. There are multiple reasons for this:
1) so you don’t have to make a separate chip for each RAM configuration
2) the reticle size is too small to allow the RAM to be on the same reticle as the SoC
3) DRAM processes are very very different that CMOS logic processes. They are optimized completely differently.
4) It is a very bad idea to put dynamic circuits of such size on the same die as logic circuitry, as they would then interact via substrate currents, etc.
The SoC does contain multiple discrete parts, but those parts are the GPU, CPU, caches, I/Os, LPDDR channels, neural engine, etc. Not the RAM.
Here’s the die photo:
You can literally see there is no RAM, and instead there are LPDDR channels, which communicate OFF CHIP to the RAM.