I would think so, or think there's a chance, based on the premise that architecture (context: generational, not ISA) nowadays needs to be designed for the node it is intended to be manufactured on, implementing more guard-rails in the design the smaller the printing has to go.
A16 is designed for "4nm", seemingly closely related to TSMC's 5nm, while 3nm is a bit of a new era that likely requires them the re-think many steps. It doesn't make sense to me why they would have invested R&D transitioning the design of the A16 to 3nm when the finishing of A17 seemingly lines up pretty well.
But, casual onlooker here. Guess we'll see. Maybe chips of M3 size still don't make economical sense on the N3B-node (which from all we hear is expensive as * and riddled with issues) and the M3 has actually been a "4nm" A16 derivative all along. A hillarious nerd-community meltdown if that was the case!