PCIe bridges (switches) always have an upstream bridge and one or more downstream bridges. The reason for having an upstream and a downstream bridge is because they can have different link (2.5, 5, 8, 16, 32 GT/s) rate and link width (x1,x2,x4,x8,x16,x32).
The TS4 does have a downstream bridge for each Thunderbolt port. Here's an example list of PCIe devices from my Mac mini (only included Thunderbolt connected stuff):
Code:
├┬00:01.1-[83-ff] # g3x4 ├┬Mac Mini Coffee Lake Root Port 1 [8086:1905] [060400] (rev 07) PCI bridge [Normal decode] : Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x8)
│└┬83:00.0-[84-ff] # g3x4 │└┬Mac Mini Titan Ridge 1 upstream [8086:1578] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015]
│ ├┬84:00.0-[86] # g1x4 │ ├┬Mac Mini Titan Ridge 1 downstream for NHI [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└─86:00.0 # g1x4 │ │└─Mac Mini Titan Ridge 1 NHI [8086:15eb] [088000] (rev 06) System peripheral : Intel Corporation JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018]
│ ├┬84:01.0-[c1-c7] # g1x4 │ ├┬Mac Mini Titan Ridge 1 downstream for TB port 1 [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└┬c1:00.0-[c2-c7] # g3x4 > g1x4 │ │└┬eGPU Titan Ridge upstream [8086:15ef] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge DD 2018]
│ │ ├┬c2:01.0-[c4-c6] # g3x4 │ │ ├┬eGPU Titan Ridge downstream for PCIe x4 [8086:15ef] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge DD 2018]
│ │ │└┬c4:00.0-[c5-c6] # g4x16 > g3x4 │ │ │└┬Readeon Pro W5700 upstream [1002:1478] [060400] PCI bridge [Normal decode] : Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Upstream Port of PCI Express Switch
│ │ │ └┬c5:00.0-[c6] # g4x16 │ │ │ └┬Readeon Pro W5700 downstream [1002:1479] [060400] PCI bridge [Normal decode] : Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Downstream Port of PCI Express Switch
│ │ │ ├─c6:00.0 # g4x16 │ │ │ ├─Readeon Pro W5700 GPU [1002:7312] [030000] VGA compatible controller [VGA controller] : Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 [Radeon Pro W5700]
│ │ │ ├─c6:00.1 # g4x16 │ │ │ ├─Readeon Pro W5700 Audio [1002:ab38] [040300] Audio device : Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 HDMI Audio
│ │ │ ├─c6:00.2 # g4x16 │ │ │ ├─Readeon Pro W5700 XHCI [1002:7316] [0c0330] USB controller [XHCI] : Advanced Micro Devices, Inc. [AMD/ATI] Device
│ │ │ └─c6:00.3 # g4x16 │ │ │ └─Readeon Pro W5700 Serial? [1002:7314] [0c8000] Serial bus controller : Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 USB
│ │ ├┬c2:02.0-[c3] # g1x4 │ │ ├┬eGPU Titan Ridge downstream for XHCI [8086:15ef] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge DD 2018]
│ │ │└─c3:00.0 # g1x4 │ │ │└─eGPU Titan Ridge XHCI [8086:15f0] [0c0330] (rev 06) USB controller [XHCI] : Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge DD 2018]
│ │ └┬c2:04.0-[c7] # g1x4 │ │ └┬eGPU Titan Ridge downstream for TB port [8086:15ef] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge DD 2018]
│ ├┬84:02.0-[85] # g1x4 │ ├┬Mac Mini Titan Ridge 1 downstream for XHCI [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└─85:00.0 # g1x4 │ │└─Mac Mini Titan Ridge XHCI [8086:15ec] [0c0330] (rev 06) USB controller [XHCI] : Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018]
│ └┬84:04.0-[87] # g1x4 │ └┬Mac Mini Titan Ridge 1 downstream for TB port 2 [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
├┬00:01.2-[05-82] # g3x4 ├┬Mac Mini Coffee Lake Root Port 2 [8086:1909] [060400] (rev 07) PCI bridge [Normal decode] : Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x4)
│└┬05:00.0-[06-82] # g3x4 │└┬Mac Mini Titan Ridge 2 upstream [8086:1578] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015]
│ ├┬06:00.0-[08] # g1x4 │ ├┬Mac Mini Titan Ridge 2 downstream for NHI [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└─08:00.0 # g1x4 │ │└─Mac Mini Titan Ridge 2 NHI [8086:15eb] [088000] (rev 06) System peripheral : Intel Corporation JHL7540 Thunderbolt 3 NHI [Titan Ridge 4C 2018]
│ ├┬06:01.0-[43-4c] # g1x4 │ ├┬Mac Mini Titan Ridge 2 downstream for TB port 1 [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└┬43:00.0-[44-4c] # g1x4 │ │└┬CalDigit Goshen Ridge upstream [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ │ ├┬44:00.0-[46] # g1x4 │ │ ├┬CalDigit Goshen Ridge downstream for XHCI [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ │ │└─46:00.0 # g1x4 │ │ │└─CalDigit Goshen Ridge XHCI [8086:0b27] [0c0330] (rev 02) USB controller [XHCI] : Intel Corporation Thunderbolt 4 USB Controller [Goshen Ridge 2020]
│ │ ├┬44:01.0-[48] # g1x4 │ │ ├┬CalDigit Goshen Ridge downstream for PCIe x1 [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ │ ├┬44:02.0-[49-4c] # g1x4 │ │ ├┬CalDigit Goshen Ridge downstream for TB port 1 [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ │ │└┬49:00.0-[4a-4c] # g1x4 │ │ │└┬OWC Alpine Ridge upstream [8086:1578] [060400] PCI bridge [Normal decode] : Intel Corporation DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015]
│ │ │ ├┬4a:01.0-[4b] # g3x4 │ │ │ ├┬OWC Alpine Ridge downstream for PCIe x4 [8086:1578] [060400] PCI bridge [Normal decode] : Intel Corporation DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015]
│ │ │ │└─4b:00.0 # g3x4 │ │ │ │└─NVMe [1cc1:8201] [010802] (rev 03) Non-Volatile memory controller [NVM Express] : ADATA Technology Co., Ltd. XPG SX8200 Pro PCIe Gen3x4 M.2 2280 Solid State Drive
│ │ │ └┬4a:04.0-[4c] # g1x4 │ │ │ └┬OWC Alpine Ridge downstream for XHCI [8086:1578] [060400] PCI bridge [Normal decode] : Intel Corporation DSL6540 Thunderbolt 3 Bridge [Alpine Ridge 4C 2015]
│ │ │ └─4c:00.0 # g1x4 │ │ │ └─OWC Alpine Ridge XHCI [8086:15b6] [0c0330] USB controller [XHCI] : Intel Corporation DSL6540 USB 3.1 Controller [Alpine Ridge]
│ │ ├┬44:03.0-[47] # g1x4 │ │ ├┬CalDigit Goshen Ridge downstream for TB port 2 [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ │ └┬44:04.0-[45] # g3x1 > g1x4 │ │ └┬CalDigit Goshen Ridge downstream for TB port 3 [8086:0b26] [060400] (rev 02) PCI bridge [Normal decode] : Intel Corporation Thunderbolt 4 Bridge [Goshen Ridge 2020]
│ ├┬06:02.0-[07] # g1x4 │ ├┬Mac Mini Titan Ridge 2 downstream XHCI [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
│ │└─07:00.0 # g1x4 │ │└─Mac Mini Titan Ridge 2 XHCI [8086:15ec] [0c0330] (rev 06) USB controller [XHCI] : Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge 4C 2018]
│ └┬06:04.0-[0b] # g1x4 │ └┬Mac Mini Titan Ridge 2 downstream for TB port 2 [8086:15ea] [060400] (rev 06) PCI bridge [Normal decode] : Intel Corporation JHL7540 Thunderbolt 3 Bridge [Titan Ridge 4C 2018]
Correction to my previous post:
The NHI controller (for Thunderbolt 1,2,3) and USB4 controller (for USB4 and Thunderbolt 4) only exist in host controllers. The Goshen Ridge is never a host controller. Maple Ridge serves that purpose.
A Thunderbolt controller includes Adapters for doing the conversion of DisplayPort and PCIe (and USB in the case of TB4/USB4) to and from Thunderbolt. You can see these listed in ioreg on Macs. I have a script that can list them on Linux using sysfs for device info and debugfs to read the Thunderbolt registers.
#30
Thunderbolt host controllers have up to two DisplayPort In Adapters. The BlackMagic eGPU and Sonnet eGPU Breakaway Puck RX 5500 XT/5700 eGPUs have Thunderbolt controllers with DisplayPort In Adapters to connect their GPUs to downstream Thunderbolt. Thunderbolt host controllers don't usually have a DisplayPort Out Adapter since displays connected to the host don't need DisplayPort to be tunnelled between the DisplayPort In Adapter and the USB-C DisplayPort Alt Mode of the Thunderbolt port.
Cactus Ridge Thunderbolt 1 host controller in my iMac14,2 has a DisplayPort Out Adapter which can be used to output DisplayPort sent from another Thunderbolt Mac to the iMac's display. Thunderbolt Target Display Mode software sets up the path between the DisplayPort In Adapter of the source Mac and the DisplayPort Out Adapter of the target iMac. The path is cross domain. The software on the target iMac switches the display's input from the GPU to the DisplayPort Out Adapter.
Thunderbolt peripheral controllers (even Goshen Ridge) have up to two DisplayPort Out Adapters.
Thunderbolt controllers have one PCI Down Adapter per downstream Thunderbolt port (1 for Thunderbolt 1,2,3 peripheral controllers, 2 for Thunderbolt 1,2,3,4 host controllers, 3 for Thunderbolt 4 peripheral controller). Thunderbolt peripheral controllers have one PCI Up Adapter. Thunderbolt host adapters do not have a PCI Up Adapter. The ioreg in macOS contains a "PCI Path" property for each PCI Adapter. The PCI Path is a path in ioreg to the PCI bridge (upstream or downstream) that the Adapter is connected to. The DROM of a Thunderbolt controller lists Adapters and contains some properties for each. For PCI Adapters, the properties include the PCI device/function number. I have a script that parse some DROM info from a dump of a Thunderbolt controller's firmware
https://gist.github.com/joevt/4f6d4d97b560efab9603ac509bf00122
The USB4 spec describes Adapters and DROM and registers and everything.