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Confirmed: Apple's A7 is 1.3 GHz dual core CPU, quad cluster GPU. Samsung 28nm HKMG.
- Thread starter chrmjenkins
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Let me put it this way: Ben Bajarin's source says it is dual core. That doesn't jive with the heterogeneous scenario you propose.
edit: And soon developers won't have to care
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Curious to see what you think of this analysis: http://seekingalpha.com/article/1694892-intel-and-apple-an-interesting-tidbit
Author makes a good case that the A7 is done in Intel, with a 22nm process.
Author makes a good case that the A7 is done in Intel, with a 22nm process.
I find it highly doubtful Intel would dedicate enough capacity to build a competing product. TSMC at 28nm laid out by hand seems more plausible to me.
It's a large leap from Intel offering their fab capacity to third parties for low volume products to a large volume product that they could potentially hope to win someday with an Atom product. Intel doesn't need the fab business to bolster a failing business model. They're doing very well.
That being said, Intel 22nm is not necessary either.
In the comments of that article, someone points out how dense GPUs can be (1.5billion in about 120 mm^2). The Xbox One APU fits 5 billion transistors in 360 mm^2. There are plenty of examples of higher density chips out there than 1 billion transistors in 102 mm^2. Yes, the design will be custom and tightly packed, but 28nm is still doable.
It stands for high-k metal gate. When geometries started getting really small they had to change the dielectric material in transistor gates for the electric field to still have an effect while not succumbing to excessive quantum tunneling because the dimensions are too small.
I'll be making a longer post after my daughter goes to bed on Anand's results.
Looks like I never posted my itemized prediction from the other thread in this thread. I'll post it below, quoted. It includes my pre sept 10 event prediction and my revised prediction after the event. After the quoted post, I'll update with the latest known form the anandtech review and explain why I got some stuff wrong, and what's still left to be known yet.
Updated prediction based on anandtech benches and review (bold now means confirmed by Apple or Anandtech):
The first thing I got wrong according to Anandtech is the foundry. Anand Shimpi believes it's still Samsung, whereas I predicted TSMC. I still think this one is up in the air given the mystery identifier on the leaked A7 PCB that doesn't match Samsung naming. We'll see.
The second thing I got wrong was the core speed and core count. My original prediction before the event was a dual core still based on the ARMv7-A ISA like Swift was. I predicted a modestly higher clock at about 1.5 GHz for moderately higher performance. After the event gave me the die size and number of transistors along with claimed performance improvements, I assumed that quad core was needed for their claimed transistor count and performance metric. 2x would require a very high IPC bump without much room for a clock bump. I then revised back to dual core after analyst Ben Bajarin informed me that he had a source saying dual core for sure. For all I know, Anand was the source
My updated cache prediction was based on what we know about the stock A57 core from ARM. It looks like Apple opted to go a little higher and do a full 64KB instruction and data cache. Anand notes that it's a little slower to access L1 cache now, but the hit rate (successful finds of desired data) has improved because of the larger cache size. L2 cache latency has greatly improved, as has latency to main memory. He also saw up to 2x memory bandwidth in some synthetic cases. This huge improvement to the memory front-end is not all that surprising because it's one of the main improvements Qualcomm implemented in between Krait revisions, which Swift was very similar to.
The design is also out-of-order as we've had since the Cortex A9 in the Apple A5. Branch prediction is up too. All these improvements help IPC.
He also notes that the RAM is indeed 1GB as predicted, and that's it's also very likely LPDDR3 as predicted. Speed is unknown as of yet, but the silkscreen markings on the A7 package from the teardown will confirm that for us.
Getting to the benchmarks, it's pretty clear even 32 bit binaries benefit from the beefed up execution resources too. The A7 allows 32 and 64 bit binaries to run side-by-side transparently, which will make it easier on developers. Anand also notes that the increase in register count alone gave up to 10% performance boost on the x86 64 bit transition because of reduced data pressure.
Many of the benchmarks hit the claimed 2x performance metric set by Apple. It's clear that the improved memory subsystem, improved core execution units, increased register count and move to 64 bit binaries have indeed increased the IPC to a realm that hits near Apple's line in the sand. It's very impressive when you consider that it's still only dual core and it's still only 1.3 GHz.
On clock speed, Anand notes that device manufacturers are clocking ARM cores higher than they intended, and they're paying for it in applied core voltages. They're compensating with much larger batteries, too.
It's interesting to note that Anand says no one in the mobile space has done variable clock frequency quite right yet, so it will be interesting to see where Apple goes in the future there. I'm also anxious to see if they've updated the power management IC (PMIC).
The GPU looks like a spot on hit. It was kind of easy to guess given it was likely to be a stock choice on Apple's part and there were realistically only 2 choices given reasonable clock speeds. I favored larger and slower given Apple's history and that turned out to be right.
For transistor density, Anand notes that there's clearly some design process overhaul leading to them packing transistors so tightly. The large G6430, which is inherently more dense because of its resource breakdown compared to 5XT GPUs, helps them achieve their density increase. The slightly larger caches help ever so slightly too.
For the 1 billion transistor claim, Brian Klug from anandtech thinks they're counting M7 too. I don't because they announced this number before talking about the M7 at all. I think there's likely a significant amount of resources spent on the secure enclave for TouchID and also for a dedicated buffer/image signal processor to handle the advanced 5S camera functions.
All in all, A7 is a very impressive update and even iPhone 5 users will feel the speed increase in their everyday tasks.
Next we need the teardown to possibly confirm manufacturer and to confirm the RAM type. After a chipworks die shot, we'll know foundry for sure and figure out how all of those transistors are being spent.
Updated prediction based on anandtech benches and review (bold now means confirmed by Apple or Anandtech):
- Manufacturer - Samsung on HKMG 28nm process
- Die Size - 102 mm2
- Transistors - approximately 1 billion
- Designer - Apple
- CPU Type - 1.3GHz Dual Core "Cyclone" 64-bit
- Instruction Set - ARMv8
- Chip Designator - S5L8960X
- L1 Cache - 64/64KB
- L2 Cache - 1MB
- RAM - 1GB LPDDR3 @ 1333 MHz (64 bit interface, PoP)
- Max Theoretical Memory Bandwidth - 10.6 GB/s
- GPU Type - "Quad Cluster" PowerVR 6430 @ 270 MHz
- GPU Performance - 69.2 GFlops, 157 MTriangles/s
The first thing I got wrong according to Anandtech is the foundry. Anand Shimpi believes it's still Samsung, whereas I predicted TSMC. I still think this one is up in the air given the mystery identifier on the leaked A7 PCB that doesn't match Samsung naming. We'll see.
The second thing I got wrong was the core speed and core count. My original prediction before the event was a dual core still based on the ARMv7-A ISA like Swift was. I predicted a modestly higher clock at about 1.5 GHz for moderately higher performance. After the event gave me the die size and number of transistors along with claimed performance improvements, I assumed that quad core was needed for their claimed transistor count and performance metric. 2x would require a very high IPC bump without much room for a clock bump. I then revised back to dual core after analyst Ben Bajarin informed me that he had a source saying dual core for sure. For all I know, Anand was the source
My updated cache prediction was based on what we know about the stock A57 core from ARM. It looks like Apple opted to go a little higher and do a full 64KB instruction and data cache. Anand notes that it's a little slower to access L1 cache now, but the hit rate (successful finds of desired data) has improved because of the larger cache size. L2 cache latency has greatly improved, as has latency to main memory. He also saw up to 2x memory bandwidth in some synthetic cases. This huge improvement to the memory front-end is not all that surprising because it's one of the main improvements Qualcomm implemented in between Krait revisions, which Swift was very similar to.
The design is also out-of-order as we've had since the Cortex A9 in the Apple A5. Branch prediction is up too. All these improvements help IPC.
He also notes that the RAM is indeed 1GB as predicted, and that's it's also very likely LPDDR3 as predicted. Speed is unknown as of yet, but the silkscreen markings on the A7 package from the teardown will confirm that for us.
Getting to the benchmarks, it's pretty clear even 32 bit binaries benefit from the beefed up execution resources too. The A7 allows 32 and 64 bit binaries to run side-by-side transparently, which will make it easier on developers. Anand also notes that the increase in register count alone gave up to 10% performance boost on the x86 64 bit transition because of reduced data pressure.
Many of the benchmarks hit the claimed 2x performance metric set by Apple. It's clear that the improved memory subsystem, improved core execution units, increased register count and move to 64 bit binaries have indeed increased the IPC to a realm that hits near Apple's line in the sand. It's very impressive when you consider that it's still only dual core and it's still only 1.3 GHz.
On clock speed, Anand notes that device manufacturers are clocking ARM cores higher than they intended, and they're paying for it in applied core voltages. They're compensating with much larger batteries, too.
It's interesting to note that Anand says no one in the mobile space has done variable clock frequency quite right yet, so it will be interesting to see where Apple goes in the future there. I'm also anxious to see if they've updated the power management IC (PMIC).
The GPU looks like a spot on hit. It was kind of easy to guess given it was likely to be a stock choice on Apple's part and there were realistically only 2 choices given reasonable clock speeds. I favored larger and slower given Apple's history and that turned out to be right.
For transistor density, Anand notes that there's clearly some design process overhaul leading to them packing transistors so tightly. The large G6430, which is inherently more dense because of its resource breakdown compared to 5XT GPUs, helps them achieve their density increase. The slightly larger caches help ever so slightly too.
For the 1 billion transistor claim, Brian Klug from anandtech thinks they're counting M7 too. I don't because they announced this number before talking about the M7 at all. I think there's likely a significant amount of resources spent on the secure enclave for TouchID and also for a dedicated buffer/image signal processor to handle the advanced 5S camera functions.
All in all, A7 is a very impressive update and even iPhone 5 users will feel the speed increase in their everyday tasks.
Next we need the teardown to possibly confirm manufacturer and to confirm the RAM type. After a chipworks die shot, we'll know foundry for sure and figure out how all of those transistors are being spent.
I found this to be the most telling statement about the new CPU in Anand's excellent review:
We are talking about a phone with the same sort of CPU power as a laptop from only a few years ago. That is truly amazing.
We are talking about a phone with the same sort of CPU power as a laptop from only a few years ago. That is truly amazing.
Fully agree but for me the most exciting prospect is where Apple can go from here. The A7 in the iPhone 5 is limited by power and heat dissipation limitations as well as just outright physical space. Net result is a SoC that's making the 'right' compromises in terms of design to achieve its performance and that surely leaves a lot of overhead to gain performance once those limitations ease.
First interesting reference will be an A7X in the iPad but if they do go to a larger screen size next year in the iPhone that'd give them a much bigger battery to play with too. An A7 (well, A8 at that point) quad core CPU design, possibly with higher clocks to boot? Really easy way to get another 'up to 2x' speed boost from the SoC.
Still think Apple may push the boat out with the A7X this year and position the iPad as a full-on pro machine. Looking at relative performance levels surely an A7 variant with, say, quad core CPU clocked up a bit along with say 2Gb of RAM would be able to manage an acceptable implementation of Aperture and the like...
I thought were at the point where specs don't really matter it just needs to work!Looks like I never posted my itemized prediction from the other thread in this thread. I'll post it below, quoted. It includes my pre sept 10 event prediction and my revised prediction after the event. After the quoted post, I'll update with the latest known form the anandtech review and explain why I got some stuff wrong, and what's still left to be known yet.
Updated prediction based on anandtech benches and review (bold now means confirmed by Apple or Anandtech):
- Manufacturer - Samsung on HKMG 28nm process
- Die Size - 102 mm2
- Transistors - approximately 1 billion
- Designer - Apple
- CPU Type - 1.3GHz Dual Core "Cyclone" 64-bit
- Instruction Set - ARMv8
- Chip Designator - S5L8960X
- L1 Cache - 64/64KB
- L2 Cache - 1MB
- RAM - 1GB LPDDR3 @ 1333 MHz (64 bit interface, PoP)
- Max Theoretical Memory Bandwidth - 10.6 GB/s
- GPU Type - "Quad Cluster" PowerVR 6430 @ 270 MHz
- GPU Performance - 69.2 GFlops, 157 MTriangles/s
The first thing I got wrong according to Anandtech is the foundry. Anand Shimpi believes it's still Samsung, whereas I predicted TSMC. I still think this one is up in the air given the mystery identifier on the leaked A7 PCB that doesn't match Samsung naming. We'll see.
The second thing I got wrong was the core speed and core count. My original prediction before the event was a dual core still based on the ARMv7-A ISA like Swift was. I predicted a modestly higher clock at about 1.5 GHz for moderately higher performance. After the event gave me the die size and number of transistors along with claimed performance improvements, I assumed that quad core was needed for their claimed transistor count and performance metric. 2x would require a very high IPC bump without much room for a clock bump. I then revised back to dual core after analyst Ben Bajarin informed me that he had a source saying dual core for sure. For all I know, Anand was the source
My updated cache prediction was based on what we know about the stock A57 core from ARM. It looks like Apple opted to go a little higher and do a full 64KB instruction and data cache. Anand notes that it's a little slower to access L1 cache now, but the hit rate (successful finds of desired data) has improved because of the larger cache size. L2 cache latency has greatly improved, as has latency to main memory. He also saw up to 2x memory bandwidth in some synthetic cases. This huge improvement to the memory front-end is not all that surprising because it's one of the main improvements Qualcomm implemented in between Krait revisions, which Swift was very similar to.
The design is also out-of-order as we've had since the Cortex A9 in the Apple A5. Branch prediction is up too. All these improvements help IPC.
He also notes that the RAM is indeed 1GB as predicted, and that's it's also very likely LPDDR3 as predicted. Speed is unknown as of yet, but the silkscreen markings on the A7 package from the teardown will confirm that for us.
Getting to the benchmarks, it's pretty clear even 32 bit binaries benefit from the beefed up execution resources too. The A7 allows 32 and 64 bit binaries to run side-by-side transparently, which will make it easier on developers. Anand also notes that the increase in register count alone gave up to 10% performance boost on the x86 64 bit transition because of reduced data pressure.
Many of the benchmarks hit the claimed 2x performance metric set by Apple. It's clear that the improved memory subsystem, improved core execution units, increased register count and move to 64 bit binaries have indeed increased the IPC to a realm that hits near Apple's line in the sand. It's very impressive when you consider that it's still only dual core and it's still only 1.3 GHz.
On clock speed, Anand notes that device manufacturers are clocking ARM cores higher than they intended, and they're paying for it in applied core voltages. They're compensating with much larger batteries, too.
It's interesting to note that Anand says no one in the mobile space has done variable clock frequency quite right yet, so it will be interesting to see where Apple goes in the future there. I'm also anxious to see if they've updated the power management IC (PMIC).
The GPU looks like a spot on hit. It was kind of easy to guess given it was likely to be a stock choice on Apple's part and there were realistically only 2 choices given reasonable clock speeds. I favored larger and slower given Apple's history and that turned out to be right.
For transistor density, Anand notes that there's clearly some design process overhaul leading to them packing transistors so tightly. The large G6430, which is inherently more dense because of its resource breakdown compared to 5XT GPUs, helps them achieve their density increase. The slightly larger caches help ever so slightly too.
For the 1 billion transistor claim, Brian Klug from anandtech thinks they're counting M7 too. I don't because they announced this number before talking about the M7 at all. I think there's likely a significant amount of resources spent on the secure enclave for TouchID and also for a dedicated buffer/image signal processor to handle the advanced 5S camera functions.
All in all, A7 is a very impressive update and even iPhone 5 users will feel the speed increase in their everyday tasks.
Next we need the teardown to possibly confirm manufacturer and to confirm the RAM type. After a chipworks die shot, we'll know foundry for sure and figure out how all of those transistors are being spent.
The iFixIt teardown is in progress right now. We've learned a few things: The baseband is still 9615M from Qualcomm. The transceiver got an upgrade to the WTR1605L so it can do TD-SCDMA (china mobile).
The audio codec, apple/cirrus amp chip and/or PMIC are all new parts. I don't think the codec has been identified yet because the two Apple named parts shown so far look way too big.
Also, the silkscreen code starts with "N" like all other previous A-series chips. This is different than the leaked PCB which started with "K". That must have been a test part of some sort, if not a TSMC part for test purposes as well. Looks like they indeed stayed with Samsung this time.
It also appears that the "M7" is actually built into the A7. Not a separate chip.
edit: Ha. iFixIt referenced my post for the RAM size.
edit 2: For reference, here's the leaked A7 image from June:
Here's the one from the teardown:
You can see they were made 37 weeks apart. Almost 9 months. Samsung would have had very limited 28nm capacity at that point (risk production) so it's possible we're looking at a TSMC test chip.
edit 3: iOS 7 now supports digital audio stream out for the iphone via the camera connection kit like the iPad does. Unfortunately, 24b/96KHz audio is still streaming only. I would say this kills the idea of an improved codec in the 5s.
The audio codec, apple/cirrus amp chip and/or PMIC are all new parts. I don't think the codec has been identified yet because the two Apple named parts shown so far look way too big.
Also, the silkscreen code starts with "N" like all other previous A-series chips. This is different than the leaked PCB which started with "K". That must have been a test part of some sort, if not a TSMC part for test purposes as well. Looks like they indeed stayed with Samsung this time.
It also appears that the "M7" is actually built into the A7. Not a separate chip.
edit: Ha. iFixIt referenced my post for the RAM size.
edit 2: For reference, here's the leaked A7 image from June:
Here's the one from the teardown:
You can see they were made 37 weeks apart. Almost 9 months. Samsung would have had very limited 28nm capacity at that point (risk production) so it's possible we're looking at a TSMC test chip.
edit 3: iOS 7 now supports digital audio stream out for the iphone via the camera connection kit like the iPad does. Unfortunately, 24b/96KHz audio is still streaming only. I would say this kills the idea of an improved codec in the 5s.
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One final update. Here's Chipworks' annotated die shot:
http://www.chipworks.com/en/technic...ources/blog/inside-the-a7/?lang=en&Itemid=815
They think the large block of SRAM (~3MB) above the GPU is for the fingerprint sensor. I don't know if I buy that. Could be for camera processing too. Maybe we'll learn more.
http://www.chipworks.com/en/technic...ources/blog/inside-the-a7/?lang=en&Itemid=815
They think the large block of SRAM (~3MB) above the GPU is for the fingerprint sensor. I don't know if I buy that. Could be for camera processing too. Maybe we'll learn more.
The chip works die piture tells of some strange blocks like the size of the dual core Cyclone cores. These are huge compared to any A15 core. The SRAM block is also intriguing. Could this be implemented similar to Xbox One eDram that does caches for cpu and gpu as well. By the looks of it, that could run from 4MB to maybe 6MB. It is a darn shame that Apple keeps their high-level architecture such a secret. At least they ought to have released the older chips like the A6 swift now that they have jumped a generation forward.
Many are really keen to see the actual performance of the A7 if this could be properly tested in the near future. Early indications looks very impressive indeed!.
Many are really keen to see the actual performance of the A7 if this could be properly tested in the near future. Early indications looks very impressive indeed!.