Several messages...
BWhaler said:
People claim it does not allow OSX run on PC's, for example, but rather let's programs run on any operating system.
SO then how is it a hardware emulator? Don't programs make calls to the operating system, not the hardware layer? (I know there are exceptions, but generally speaking.
Well, the only part of the hardware that is actually emulated is the processor, everything else is done by mapping system calls to the native API, thus QuickTransit can only run applications but no operating systems.
As for more my general reaction, if this let's me run any Windows app on OSX with similar speeds, but does not let OSX run on WinTel, I think this would be a HUGE boost for Apple. Fingers crossed...
Currently this seems to be for Unix/Linux type operating systems, most likely due to their familiar API. This means no Windows applications will run, because there is no API mapper for it.
shamino said:
The only production example of this concept (an intermediate assembly language) that I'm aware of is the GNU assembler (part of their
binutils package). It's my understanding that the gcc compiler works by generating an intermediate meta-assembly language, which is then assembled into native code using this assembler.
Well, there is also the virtual processor (VP2) used by the TAO Group to dynamically generate code even on hybrid multi-processors, which the post preceding yours mentions. I almost mentioned it myself, when I noticed a subtle, but important difference: With VP2 and binutils the source is a high-level language, while in this case the source is machine code.
I suppose you could apply similar techniques to compile one processor's assembly language into another.
Not really. Even if you take very basic operations you'll find subtle but problematic differences between various instruction sets.
Some processors have all arithmetic operations generate condition flags, others do it optionally (eg. SPARC, PowerPC, ARM), and some don't have any condition flags (eg. MIPS, Alpha).
Extended subtraction with carry is handled in two ways either as carry or as borrow (even the mnemonic for x86 is SBB).
Some RISC architectures have no rotation at all (eg. MIPS, Alpha), at least one has no separate shift and rotation instructions but does it combination with another instruction (ARM).
I already mentioned that division is particularly diverse:
Alpha and ARM have no integer division instruction at all;
MIPS and SuperH perform that calculation in a special unit and have to fetch the result and the remainder from HI/LO registers;
PowerPC doesn't calculate the remainder and also has no special remainder instruction but has to calculate the remainder wih a multiplication and subtraction following the division;
PA-RISC and SuperH calculate division in steps, ie. they have to use an instruction for each bit of the result (IIRC).
And last but not least of these few examples, PA-RISC and x86 are the only current architectures I'm aware of having BCD capabilities.
As I wrote before, there are two extremes to handle that:
Either you add every feature to the intermediate representation, thus making it so bloated that it'll be a nightmare to retarget the native code generator to another architecture, because you have to support all those features in the backend.
Or you make the intermediate representation so basic that a lot of simple source instructions end up as big sqeuences in the intermediate step, thereby making optimization a real nightmare.
Of course there might be the possibility of a compromise, but frankly, I haven't found a decent compromise after analysing over a dozen architectures in search for one. Well, maybe those guys are a whole lot brighter than I am, who knows?
I'm not saying it's impossible to do retargetable dynamic binary translation, but I don't think they are able to do it AND achieve 80% of the native performance as well.
MadMan said:
According to this, they claim it can run OS X on x86?!?!
http://www.extremetech.com/article2/0,1558,1645408,00.asp
Either the claim "Company executives said the technology could be used to run the Apple Macintosh OS on top of an X86 processor." is plain wrong, or the author of the article didn't understand them correctly.
Taken from the official website:
"First, an integration FUSE allows QuickTransit to be easily integrated into the target system. Second, a dynamic binary translator tackles the challenge of moving from one instruction set architecture to another. Third, an operating system mapper translates operating system calls from the source system to the target system in situations where the source and target operating systems are different."
http://www.transitive.com/technology.htm
If this information is correct, it means that they cannot run MacOS with QuickTransit, because you have to emulate more than just the CPU to run a full operating system.
Of course they COULD run MacOS applications, IF they had API mappers for Cocoa, Carbon, and QuickTime, which I doubt. Which leaves Darwin applications, and those can run on a x86 processor anyway...
BTW, the article also mentions that "likewise, a PowerPC chip can also run an X86-designed OS, such as Windows, on top of it".
But it CANNOT, because according to the Transitive technology page "QuickTransit supports operating system mapping between any two Unix/Linux-like operating systems, as well as mapping between mainframe and any Unix/Linux-like operating systems." Since Windows doesn't belong to that group of operating systems, no chance.
Of course they COULD run Windows applications on a PowerPC machine, IF they had mappers for the Windows API, but similar to MacOS that's a big "if".