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The Register reports on the future of the G4 Processor:

By this time next year three as yet unannounced versions of the G4 will dramatically boost internal bandwidth, support switched fabric interconnects, and will see the processor talk to memory at full bus speed, according to disclosures from Motorola sources.


Advances include RapidIO architechture, .13 micron process, MPX+, and up to a 14 stage pipeline.
 
I think there will be G4 and iMac upgrades at Paris Expo.

Apple is getting highly involved with the independant MacExpo. I think we might see small product upgrades here like the iPod and stuff like FCP.
 
Summary + Comments

New G4s
7470 by summer
7500 later
up to 1.5GHz for 7470
266MHz bus for 7470, 500MHz RapidIO bus for 7500
512k on chip L2 cache, 4 MB DDR L3 cache for 7460
memory controller on chip, running at chip clock speed for 7500
7460 - low power 7470, no L3 cache
.13 micron process
14 stage pipeline for 7500
---------------------------------------
Looks like they took a bunch of G5 stuff and put it on a G4... maybe the G5 isn't going as well as they expected. However, it may not be necessary. This fixes all the biggest problems of the G4; Between the faster bus and much bigger cache the new G4s (if they actually exist) we shouldn't have any problems keeping this processor fed with data. Also, the .13 micron process will reduce power requirements... can anyone say 1GHz+ Powerbook and Sahara iBook? Still, the Register isn't particularly reliable (although better than mosr), so don't hold your breath.
 
I'm wondering how surprised we're all going to be from Apple when they get going on all of this...

I bet we're thinking in one direction while they are in a completely different one...

what do u guys think is going to happen?

ps: and please, not bitching about what u think they aren't going to do!!
 
That´ll do... Yeah!

Ok, no G5, sounds more probable the more I hear everywhere. But a 500 MHz System Bus will make up for all the disappointment :D
But why is the pipeline 14 stages long?

At least DDR RAM and some phat cache :)

Don´t know what you guys say, looks good to me!
And expect certainly more than one of these cuties in one PowerMac :D
 
from the little info that we have, this processor doesn't make me very excited. in fact it makes me worried.

14 stage pipeline!!! what the hell are they thinking!! Can some one say P 4!!!! What moto is doing is making the g4's more like pc processors so they can run more mhz (or ghz) through them. But with the longer pipe line the effects of that extra 500 mhz (if that) will be nominal. Oh wait i just realized what they are thinking. More mhz = more sheep-like consumers going "oooh, ooooh more mhz, its gotta be faster" which translates to more sales to the average know nothing buyer.

but for people that look more at the capabilities of the chip than its mhz, this isn't going to cut it.

The only thing i can hope for with this rumor is that this chip is going into the iMac and not the pro tower. this would make sense since the big mhz mean more to the average consumer (target of the iMac) than pipeline stages and memory bandwith (pro - prosumer). I'm going to keep my fingers crossed and hope for the g5 to come out before this chip. If not i want to see quad apollos at what ever the mhz running on an improved motherboard (faster internal bus, more ram? [possibly ddr but not untill they make it cooler], improved firewire [firewire 2, gigawire, whatever wire...] ) and standard ata 100 or ata 133 for internal drives.

If this chip is what is instore for the future of apple's pro line, any hopes of gaining some ground over our pc brethren have just gone straight out the window.

note: above should be taken with a grain of salt due to the cryptic nature of this rumor. i'm going on pure speculation and the nature of long pipelines:rolleyes:
 
Long pipelines...

...is not necessarily a bad thing. With a 14 stage pipeline you can have 14 operations in different stages of the pipeline and each stage can go faster, but if you mispredict on a branch (if the program has an "IF" statement, and you guess wrong for which branch it takes) then it takes a lot of time to clear out the longer pipeline of useless data. With a good BPU (Branch Prediction Unit) a long pipeline can be a good thing. The P4 just takes it to ridiculous extremes with its 20 stage pipeline.

Also, what makes people think a faster system bus will do anything if the ram it's hooked to is slow? A faster system bus will have to have DDR ram to do anything.

pipeline info from http://www.arstechnica.com , which has everything you'll ever need to know about current and upcoming processors (read their article about the Transmeta Crusoe... I want Transmeta to make PPC code morhping software... dual platform chip, it would be awesome).
 
I wouldn't be surprised to see Motorola add the high end I/O interfaces to the G4. It makes a lot of sense for them to do that, especially in the embedded market. Apple can take advantage of that by migrating to DDR, etc. on the G4 machines.

The .13 micron process makes a lot of sense too because they have been having a lot of trouble scaling the current fab process for the G4 as we all know.

A 14 stage pipeline sounds a little extreme for Motorola. They have not followed that philosophy and it does not make much sense to simply trade pipeline stages for clock speed, again especially in the embedded market. In fact, same performance at lower clock speed resulting in less power disipation is one of the biggest reasons Motorola kills Intel in the embedded market.

On the other hand, pipeline depth, clock speed and how well the branch prediction logic performs all effect efficiency and performance. What if you were to improve the branch prediction logic so that you could double the depth of the pipeline without loosing any performance. That would allow you to increase the clock speed and actually see a performance gain, unlike what happened to the P4. I wouldn't be surprised to see something like that happen as well.

Just my $0.02.
 
Also

It's only the FPU that is 14 stages (not sure if this affects altivec>) the interger pipline is only 11 stages. As has been mentioned already, longer pipline does not necessarliy mean a horribly less effiecient processor, if the branch prediction unitl is highly effecient then there should be no worries, this is just what has to be done to increas clock speed to such hgh levels, and as long as the net work being done per unit of time goes up, this is a good thing. Also comparing the pipline depth of the G4 to PC processors make little sense, because of the inherint differences between CISC processing and RISC processing.
 
PC processors do not process CISC instructions, they process RISC like instructions which come from x86.
But yes there are major differences in cpu architecture.
 
The Athlon has around a 12 stage pipeline and it does fine. Increasing the pipeline is one of many tricks you can use to allow a CPU to reach higher speeds. The PIV is an example of making a CPU that can clock very high but has a very low IPC, the Athlon is the right balance of IPC and clock speed. One thing you need to keep in mind with computers is balance. Everything needs to balance, that is why DDR is the best thing Apple could do in the near future. Right now the 1GHz are not balanced with the memory system, the large cache helps but there still is a problem. The die shrink is a really big deal. That is the best way to increase MHz, just make the same thing smaller and you can crank it up a few notches. As far as Risc vs Cisc that is pretty much dead at this point. All the new X86 cpu decode all the Cisc instructions to smaller Risc like microps that are they ran by the CPU.

I really hope Apple people do not get into the big “member” contest that I see with PC users. They seem to be more interested in how fast their computer is and not on what that allows them do to. Sometimes I just want to tell them that the CPU upgraded they just bought will not make a damn bit of difference. If your computer does what you want then it is fast enough.
 
Re: That´ll do... Yeah!

Originally posted by Stike
Ok, no G5, sounds more probable the more I hear everywhere.

I don't get you guys. How on earth does this prove that there won't be a G5? Have you forgotten that the iMac now sports a G4, and soon the iBooks will too? Where does it say that this new G4 technology will be used in PowerMacs and not iMacs/iBooks?
 
Re: ..

Originally posted by T\'hain Esh Kelch
He probably means no G5's in the next months.. ;)

Aahh, yeah, THAT was my statement! :D
And I´m not working for Apple - even if you don´t believe me now ;)

Do not misinterpret my lines :D :D :D
 
The Register's Goofed

On the origional Motorola PowerPC Roadmap the G5 had the numbering of 75xx. When Motorola released their first G5, the MPC 8540, that was changed to 85xx. That the Register is talking about a 7500 chip with some of the key features of the G5 (ie rapidIO) suggests to me that someones been reading some old info!!

PS: Heres the specs for the MPC 8540. It's targeted at the integraded products market (ie routers) and so is a low power chip. That doesn't mean that it coludn't turn up in a PowerBook though!! (although the built in PCI-X bus would be a bit of a waste)

Features:

e500 "Book E" Processor 600MHz - 1GHz
256KByte On-chip L2
128Gb/s On-chip Fabric
333MHz DDR Memory Controller
Advanced I/O Ports
RapidIO
64b PCI-X
dual 10/100/Gbit Ethernet
General Purpose parallel I/O port
4-Channel DMA
Interrupt Controller (8 discreet or 16 serial)
DUART Serial Interface
Modular Design

Link to Motorola's MPC8540 page
 
MPC7400 was the first to be termed by Apple as the G4 chip.

Now we are at MPC7455 in the 1 ghz machines.

The G4 and Beyond article talks about the MPC7470 to come, which is also a G4.

The MPC7500, I think, is the G5, or at least that is what Apple might call it. This is a move by Moto from the MPC74xx to the MPC75xx.

If Apple continues to call the MPC7xxx G4's, then the MPC85xx will be the G5. Moto will change the chip, though, to suit the Mac, rather than a router. Also, I think they will add AltiVec.

I think that I agree most clostly with eddit.
 
Motorola Roadmap

If you look at the Motorola roadmap you can see that the G5 was supposed to have a new pipeline.

PowerPC Roadmap

This suggests that a chip with modified pipeline is the G5.

PS: At the bottom of the roadmap the 8xxx series processors (which includes the 85xx G5) are for the integrated processor market, whereas the 7xxx series is for the computing market. It is possible that they may resurect the 75xx labeling for G5's targeted at the computing market.:confused:
 
Re: Motorola Roadmap

Originally posted by eddit
If you look at the Motorola roadmap you can see that the G5 was supposed to have a new pipeline.

PowerPC Roadmap

This suggests that a chip with modified pipeline is the G5.

PS: At the bottom of the roadmap the 8xxx series processors (which includes the 85xx G5) are for the integrated processor market, whereas the 7xxx series is for the computing market. It is possible that they may resurect the 75xx labeling for G5's targeted at the computing market.:confused:

I think you're on to something there. The 7500 could be the desktop version of the 8500 (higher power, Altivec, embedded specific stuff taken out). Everything we know about the 7500 fits: RapidIO, 14 stage pipeline, >1GHz, etc... Now if only we knew whether the 7500 is 64 bit like the 8500 is supposed to be, that would pretty much confirm it.
 
Re: ..

Originally posted by T\'hain Esh Kelch
He probably means no G5's in the next months.. ;)


Actually you're right ! Despite the rumors, I'm not just expecting it until next september, at least!!! probably by january 2003... I know, that's far, but Apple has just release high performance computer 3 weeks ago or so. I'm just wondering if they will continue to improve their old G4, but still powerful, and trying to keep the G5 for next year...
 
Re: Motorola Roadmap

Originally posted by Catfish_Man


I think you're on to something there. The 7500 could be the desktop version of the 8500 (higher power, Altivec, embedded specific stuff taken out). Everything we know about the 7500 fits: RapidIO, 14 stage pipeline, >1GHz, etc... Now if only we knew whether the 7500 is 64 bit like the 8500 is supposed to be, that would pretty much confirm it.

According to the roadmap the G5 can be either 32 or 64 bit.
 
Re: Re: Motorola Roadmap

Originally posted by eddit


According to the roadmap the G5 can be either 32 or 64 bit.

Another good point. Sounds like even if the 7500 isn't the G5 there'll be no way of telling that it isn't.
 
The more I think of it, the MPC8xxx is for embedded systems alone. Moto most likely did not attempt to convert it for host use. That leaves me to believe in this speculation: MPC7470 G4 in July 2002 and MPC7500 *G5* in January 2003.

The MPC85xx has a different architecture than the MPC7500, so, I don't think that the MPC85xx is what the MPC7500 *G5* is based on.

Does anyone think this sounds right?
 
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