How would a M2 Extreme bench?

[Longplays]

Rumor has it that Apple couldn't get M2 Extreme to work or couldn't get the fab yield they wanted.

So what if they did... assuming this was the unbinned M2 Extreme vs unbinned M2 Ultra how would it score with the synthetic tests or even real world benchmarks?

Chips	M2 Extreme (theoretical)	M2 Ultra
CPU	48-Core	24-Core
High-performance	32x	16×
High-efficiency	16x	8×
GPU	152-Core	76-Core
Neural Engine	64-Core	32‑Core
Transistors	268 billion	134 billion
Max unified memory	384GB	192GB
Memory bandwidth	1.6TB/s	800GB/s

 

[leman]

Rumor has it that Apple couldn't get M2 Extreme to work or couldn't get the fab yield they wanted.

M2 family does not include any technology for connecting four dies together, neither do relevant Apple patents go beyond 2-die system. I'd say it was not in the books for long time. Maybe the rumoured 4x system is 3nm+ tech, or maybe it was just a rumour.

So what if they did... assuming this was the unbinned M2 Extreme vs unbinned M2 Ultra how would it score with the synthetic tests or even real world benchmarks?

Just take M2 Ultra and multiply its multi-core and GPU scores by 1.7x

 

[theorist9]

Depends on the synthetic test. For the GB6 OpenGL and Metal GPU compute scores, the scaling between the M2 and M2 Ultra is ~ core count x 0.65. If that scaling continues between the Ultra and Extreme, you'd multiply the Ultra's current scores by 2*0.65 = 1.3. For comparison, with the NVIDIA 3000 series OpenGL scores, the multiplier would be ~ 1.44 (for constant clock speed).

 

[Sydde]

Max is not currently built to combine into an Extreme: they would have to extend the interconnect down one side to allow the four Maxes to be arranged like flower petals, which would leave a center space that could contain, say, a L4-like shared cache.

But Apple would have to see a need, which I am not suspecting they do. There are almost no workloads that can fully saturate an Ultra (even with Apple's HBM, it is pretty difficult to keep the SoC properly fed). If they are looking to produce a high-performance machine, they would probably be better off making more headroom to up-clock the GPU.

 

[Burnincoco]

Stop with the “M2 wasn’t designed for this”. He said theoretical.
Now someone do the Geekbench math pls.

Extreme could come to M3 since it will be smaller and more efficient

 

[Sydde]

Extreme could come to M3 since it will be smaller and more efficient

The problem is, the N3 that we expect M3 to use is not that much of a shrink. It seems that SRAM cells are less than 5% of a gain, and the bulk of the SoC is SRAM, exceeding operating logic by a large margin. The wafers are very expensive and the yields are, meh, passable. Hopefully the "FinFlex" layout will provide enough of a performance advantage to make up for the all but non-existent die shrink.

 

[leman]

The problem is, the N3 that we expect M3 to use is not that much of a shrink. It seems that SRAM cells are less than 5% of a gain, and the bulk of the SoC is SRAM, exceeding operating logic by a large margin. The wafers are very expensive and the yields are, meh, passable. Hopefully the "FinFlex" layout will provide enough of a performance advantage to make up for the all but non-existent die shrink.

Or something like this: https://patentscope.wipo.int/search/en/detail.jsf?docId=US398111768

They specifically mention manufacturing compute and memory using different processes. We might see this solution with next-gen tech already.