Details of IBM's new PowerPC chip to be released in late 2003 are trickling in. The official Press Release is found at IBM's site, and provides little additional information on the upcoming processor.
Mr.Hey provides this article from Silicon Strategies which provides more detailed information on the 32-bit/64-bit implementation of the processor:
According to the article, 32-bit PowerPC OS's simply need to support new data structures and interrupt handlers, but 32-bit PowerPC apps would run unchanged.
The Register provides details from the Microprocessor Forum conference... and reports projections of SPECint2000 and SPECfp2000 scores of 937 and 1051 respectively at the 1.8GHz speed. According to this chart the 2.8GHz Pentium 4 currently has SPECint2000 and SPECfp2000 scores of 970 and 938 respectively.
Mr.Hey provides this article from Silicon Strategies which provides more detailed information on the 32-bit/64-bit implementation of the processor:
IBM's approach to implementing a 32/64-bit architecture appears straightforward. The 970 supports full 64-bit registers and addressing. When a flag bit is sent it triggers a 32-bit mode in which the high-order words on an arithmetic logic unit and on memory addresses are ignored. In either 64- or 32-bit mode, the processor issues up to eight instructions per clock cycle.
According to the article, 32-bit PowerPC OS's simply need to support new data structures and interrupt handlers, but 32-bit PowerPC apps would run unchanged.
The Register provides details from the Microprocessor Forum conference... and reports projections of SPECint2000 and SPECfp2000 scores of 937 and 1051 respectively at the 1.8GHz speed. According to this chart the 2.8GHz Pentium 4 currently has SPECint2000 and SPECfp2000 scores of 970 and 938 respectively.