M3 Max - 4 dies allowing 40 CPU cores

[exoticSpice]

Apple’s Road Map for Mac Chips Shows Likely Advantage Over Intel

Last month, Intel CEO Pat Gelsinger declared that winning back Apple’s business was one of his top priorities, a move that would ease the shame of Apple having dropped Intel processors from its Mac line of computers in favor of its own designs. It looks like Gelsinger has his work cut out for ...

www.theinformation.com

Computing News, Laptop Reviews, Windows, macOS, and More | Digital Trends

News, reviews, and discussion about desktop PCs, laptops, Macs, GPUs, and everything else in the world of computing, including in-depth reviews and buying guides.

www.digitaltrends.com

Wayne Ma suggests that M3 will rival or even surpass Intel offering at that time. It will have 4 dies on "M3 Max" allowing up to 40 cores and this will be based on 3nm.

Can someone please explain what is meant by 4 dies on M3 Max and how many dies does the current M1 Max have?

And also is this possible on 3nm?

Thank You

 

[crazy dave]

Apple’s Road Map for Mac Chips Shows Likely Advantage Over Intel

Last month, Intel CEO Pat Gelsinger declared that winning back Apple’s business was one of his top priorities, a move that would ease the shame of Apple having dropped Intel processors from its Mac line of computers in favor of its own designs. It looks like Gelsinger has his work cut out for ...

www.theinformation.com

Computing News, Laptop Reviews, Windows, macOS, and More | Digital Trends

News, reviews, and discussion about desktop PCs, laptops, Macs, GPUs, and everything else in the world of computing, including in-depth reviews and buying guides.

www.digitaltrends.com

Wayne Ma suggests that M3 will rival or even surpass Intel offering at that time. It will have 4 dies on "M3 Max" allowing up to 40 cores and this will be based on 3nm.

Can someone please explain what is meant by 4 dies on M3 Max and how many dies does the current M1 Max have?

And also is this possible on 3nm?

Thank You

The M1 Max is one die. There is strong evidence that an M1 Max Duo (for lack of a better name since we don’t have one yet) will exist in the next year. This will take two M1 Max dies and use an interconnect to effectively make them one processor (this isn’t completely free - data has to be shared across the interconnect). This will be part of the packaging process that turns a die into the full SOC (connecting RAM and so forth). The packaging technology is different from the fabrication node (eg TSMC 3nm) that makes the die (M1 Max) but it may be built with a specific fabrication node in mind or not be ready until that node is.

Wayne Ma is saying that by the M3 generation we might see 4 dies packaged together with 40 CPU cores. Though there are some wondering if that precludes it happening earlier or if that’s just what he has definite confirmation on.

Let’s say for the sake of argument that we get a four dies this generation, we’d have an:

M1 Max (1 die, up to 10 CPU cores, 32 GPU cores)
M1 Max Duo (2 dies, up to 20 CPU cores, 64 GPU cores)
M1 Max Quadro (4 dies, up to 40 CPU cores, 128 GPU cores)

They’d all be 1 SOC, one processor, but different number of dies within that processor.

 

[exoticSpice]

The M1 Max is one die. There is strong evidence that an M1 Max Duo (for lack of a better name since we don’t have one yet) will exist in the next year. This will take two M1 Max dies and use an interconnect to effectively make them one processor (this isn’t completely free - data has to be shared across the interconnect). This will be part of the packaging process that turns a die into the full SOC (connecting RAM and so forth). The packaging technology is different from the fabrication node (eg TSMC 3nm) that makes the die (M1 Max) but it may be built with a specific fabrication node in mind or not be ready until that node is.

Wayne Ma is saying that by the M3 generation we might see 4 dies packaged together with 40 CPU cores. Though there are some wondering if that precludes it happening earlier or if that’s just what he has definite confirmation on.

Let’s say for the sake of argument that we get a four dies this generation, we’d have an:

M1 Max (1 die, up to 10 CPU cores, 32 GPU cores)
M1 Max Duo (2 dies, up to 20 CPU cores, 64 GPU cores)
M1 Max Quadro (4 dies, up to 40 CPU cores, 128 GPU cores)

They’d all be 1 SOC, one processor, but different number of dies within that processor.

So that means Wayne Ma is suggesting that M3 Max will have 4 dies like M1 Max Quadro. If that is indeed what Wayne is saying we maybe looking at 40CPU cores in M3 Max in a laptop. IF this is true, OH MY.

Wayne can't be talking about M1 Max Quadro in the article as he references the code names of M3 generation which are
Ibiza, Lobos, and Palma.

 

[crazy dave]

So that means Wayne Ma is suggesting that M3 Max will have 4 dies like M1 Max Quadro. If that is indeed what Wayne is saying we maybe looking at 40CPU cores in M3 Max in a laptop. IF this is true, OH MY.

Wayne can't be talking about M1 Max Quadro in the article as he references the code names of M3 generation which are
Ibiza, Lobos, and Palma.

No I know hence why people are wondering if we’ll even get a Quadro in this generation. (Also the current M1 Max dies seem to be set up for being paired in a two die configuration but not more - but a 4 die chip could be based on something else that hasn’t been released yet … like an M1 Max die that *is* set up for 4 ).

Regardless Digital trends is getting a bit too excited. Even by M3 a Max Quadro type chip in a laptop is unlikely. As efficient and small as N3 is, that’s asking a bit much. What is possible however is that the M3 Max itself will be 4 smaller interconnected dies. The nice thing about doing it this way is that silicon fabrication is extremely expensive and slated to get worse. Producing smaller dies that can then be stitched together is often more economical than producing one massive die where if there’s a significant enough problem you have to throw the whole thing away. Also it gives the option for more variants of a single chip as you have the option to mix and match pieces like legos depending on the design. The downside is that on die is always the fastest most energy efficient way to communicate data. New packaging technology with new interconnects try to solve this problem and close the gap so it’s good enough that you don’t care anymore.

 

[mr_roboto]

So that means Wayne Ma is suggesting that M3 Max will have 4 dies like M1 Max Quadro. If that is indeed what Wayne is saying we maybe looking at 40CPU cores in M3 Max in a laptop. IF this is true, OH MY.

No, this won't happen in a laptop. Too much power. Expect laptops to stick with single die configurations; multi-die will likely only show up in desktop systems. Think: the high end Mac Mini, 27" (or whatever the size ends up being) iMacs, and Mac Pro.

 

[crazy dave]

No, this won't happen in a laptop. Too much power. Expect laptops to stick with single die configurations; multi-die will likely only show up in desktop systems. Think: the high end Mac Mini, 27" (or whatever the size ends up being) iMacs, and Mac Pro.

True for Apple designed laptops but PCs definitely put 200W+ CPU/dGPU combos in laptops that weigh 6lbs + charger, get just over an hour of battery life on full performance, and sound like the deck of a busy aircraft carrier when they’re idling. Apple could theoretically do the same. They almost certainly won’t … but they could.

However laptop chips could still be multiple dies … they’d just have to be smaller dies like say two M1’s glued together would probably be a 70W chip - very similar to an M1 Pro (in fact it’d basically be one + 2 E cores). Obviously a base M1 isn’t setup for that - I’m just using it as an example that if the packaging technology is good enough Apple could design small modular pieces meant to fit together and create their higher order chips from those.

 

[leman]

Did they mention any time frames? Intel is supposed to launch their multi-chip platform, Meteor Lake, by early 2024. If, as some claim, Apple is on a 18 or 24 months cadence, those M3 chips could still be multiple years away.

 

[elbert]

Future

• 3 nm ~ 2022
• 2 nm ~ 2024

 

[leman]

Future

• 3 nm ~ 2022
• 2 nm ~ 2024

That doesn't tell us much though. TSMC started producing 5nm on commercial scale in 2020. It was still almost two years later that we saw a pro-level desktop Apple chip on 5nm. My concern is simply that if Apple is indeed on a 18-24 month cadence here, it might be another 3-4 years until we see these chips which would make all these claims of "beating Intel" highly dubious. If instead Apple launches M3 chips in 2023, well that would be awesome.

 

[apparatchik]

By the current cadence M3 should arrive in 2024, not 2023. M2 is expected to just arrive by 3rd or 4th Q 2022.

 

[elbert]

That doesn't tell us much though. TSMC started producing 5nm on commercial scale in 2020. It was still almost two years later that we saw a pro-level desktop Apple chip on 5nm. My concern is simply that if Apple is indeed on a 18-24 month cadence here, it might be another 3-4 years until we see these chips which would make all these claims of "beating Intel" highly dubious. If instead Apple launches M3 chips in 2023, well that would be awesome.

Its a clickbait article for nerds to rage themselves silly into.

 

[Freeangel1]

I got news for you. By 2023 Intel will be down to 3nm also. And probably running 40 cores or more also.

They purchased at least 12 of the machines TSMC uses to make their 5nm chips.

This is not difficult rocket science. anyone that can afford the cost of those chip making machines TSMC uses and years of CPU knowledge like intel can make 3nm CPU's.

Intel orders ASML system for well over $340 million in quest for chipmaking edge

AMSTERDAM : Intel has placed the first order with ASML for a new, advanced chipmaking tool that will cost "significantly" more than $340 million, as semiconductor manufacturers look to get ahead in a booming industry. Alongside better-than-expected fourth-quarter earnings, ASML said on Wednesday...

www.channelnewsasia.com

 

[Bug-Creator]

If buying some machine is all it takes, why hasn‘t Intel bought some when they were stuck on 14nm forever?

But with M3 going 3nm Apple has 2 paths
- smaller dies using less power
- more transistors offering more functionality an performance on 1 die using as mich power as the M1 variants

 

[leman]

I got news for you. By 2023 Intel will be down to 3nm also. And probably running 40 cores or more also.

They purchased at least 12 of the machines TSMC uses to make their 5nm chips.

This is not difficult rocket science. anyone that can afford the cost of those chip making machines TSMC uses and years of CPU knowledge like intel can make 3nm CPU's.

Intel orders ASML system for well over $340 million in quest for chipmaking edge

AMSTERDAM : Intel has placed the first order with ASML for a new, advanced chipmaking tool that will cost "significantly" more than $340 million, as semiconductor manufacturers look to get ahead in a booming industry. Alongside better-than-expected fourth-quarter earnings, ASML said on Wednesday...

www.channelnewsasia.com

Indeed. Intel has a very aggressive roadmap and it is likely that they will deliver on their node improvement and new technology promises. The bigger question of course if they can improve their basic core design — and they have shown nothing here. Alder Lake is the biggest redesign in the last decade for Intel and all they managed to achieve is a minuscule improvement in performance. Intel has no chance competing with Apple on efficiency like this, not even if they have a node lead over TSMC.

Of course, should Intel have a node lead over TSMC Apple will probably hire them to make the new Apple Silicon chips.

If buying some machine is all it takes, why hasn‘t Intel bought some when they were stuck on 14nm forever?

Bad Intel leadership execution has been a big topic in the last couple of years. That's why they hired a new CEO who is familiar with the engineering.

 

[jdb8167]

Future

• 3 nm ~ 2022
• 2 nm ~ 2024

Those are from old plans. Both 3nm and 2nm at TSMC have been delayed.

TSMC Roadmap Update: 3nm in Q1 2023, 3nm Enhanced in 2024, 2nm in 2025​

 

[cmaier]

So that means Wayne Ma is suggesting that M3 Max will have 4 dies like M1 Max Quadro. If that is indeed what Wayne is saying we maybe looking at 40CPU cores in M3 Max in a laptop. IF this is true, OH MY.

Wayne can't be talking about M1 Max Quadro in the article as he references the code names of M3 generation which are
Ibiza, Lobos, and Palma.

I always wonder about these code names. At AMD, the code names the press kept using were code names nobody on the engineering team ever heard of. We had our code names, and I guess our PR department had their own.

To this day, I often have no idea what chip people are talking about, even though it turns out I designed them. (I also seldom knew the name we actually sold the chips as, beyond their base name - Opteron or K6 or whatever. The variations meant nothing to me.)

 

[cmaier]

Indeed. Intel has a very aggressive roadmap and it is likely that they will deliver on their node improvement and new technology promises.

I would say it’s 50/50. Physics is a bitch. If it were just a question of pressure to do it, it would have already been done.

 

[exoticSpice]

I always wonder about these code names.

Apple names their codenames for SoC using real life island names.

 

[crazy dave]

Apple names their codenames for SoC using real life island names.

His point was that the engineers working on these chips may call them something else. In his experience, even the supposedly internal code names for processors are not really internal to the engineers who are building them - just internal to marketing/corporate.

 

[Xiao_Xi]

Apple names their codenames for SoC using real life island names.

Apple seems to really like island names.

https://twitter.com/x/status/1473304917876285444

 

[cmaier]

His point was that the engineers working on these chips may call them something else. In his experience, even the supposedly internal code names for processors are not really internal to the engineers who are building them - just internal to marketing/corporate.

Exactly. Take AMD names like ”Newcastle.” We never called it that. I never heard of that until I just googled it. It was just Clawhammer 130nm. Someone in marketing makes up these other code names that nobody in engineering other than the highest level manager has heard of.

 

[mr_roboto]

Exactly. Take AMD names like ”Newcastle.” We never called it that. I never heard of that until I just googled it. It was just Clawhammer 130nm. Someone in marketing makes up these other code names that nobody in engineering other than the highest level manager has heard of.

It seems that Apple likes to keep things perfectly clear:

GitHub - AsahiLinux/docs: Asahi Linux documentation

Asahi Linux documentation. Contribute to AsahiLinux/docs development by creating an account on GitHub.

github.com

I'd guess that most RTL design and verification engineers use the names found in the "Internal" column while physical design onwards thinks in terms of the "SoC" column. This is based only on what I see for M1 Pro and M1 Max, which are both H13J (same logical design) but split into Pro=T6000 and Max=T6001 (physical design variants).

 

[cmaier]

It seems that Apple likes to keep things perfectly clear:

GitHub - AsahiLinux/docs: Asahi Linux documentation

Asahi Linux documentation. Contribute to AsahiLinux/docs development by creating an account on GitHub.

github.com

I'd guess that most RTL design and verification engineers use the names found in the "Internal" column while physical design onwards thinks in terms of the "SoC" column. This is based only on what I see for M1 Pro and M1 Max, which are both H13J (same logical design) but split into Pro=T6000 and Max=T6001 (physical design variants).

At AMD us design engineers were also responsible for our own physical design

 

[elbert]

Those are from old plans. Both 3nm and 2nm at TSMC have been delayed.

TSMC Roadmap Update: 3nm in Q1 2023, 3nm Enhanced in 2024, 2nm in 2025​

wikipedia needs updating

 

[deconstruct60]

I got news for you. By 2023 Intel will be down to 3nm also.

TSMC N3 iGPU tiles/chiplets? Yes. in 2023 they highly likely will have those.

Intel 3 desktop x86 cores in 2023 ? Probably not. That is stretch.

1. Intel 4 ( old "Intel 7nm") slid from 2021 -> 2022 . Going from Intel 4 to 3 in 12 months. Really? After turning in 12 , 18 month type schedule slides, if Intel get that down to just 3-4 months that would be big progress. I think the slideware says Q4 2023 ... but reality is likely 1H 2024.

2. Even if Intel 3 is working at reasonably good volumes the pressure on Xeon SP line up is likely going to be greater. If Gen 13 (Raptor lake) desktops and Gen 14 (Meteor Lake) mobile processors get good traction then good chance they won't prematurely kill them.

3. The "Lunar Lake" rumors of 8P + 32E smells like somebody is doing a "monkey see, monkey do" copy to get to a core count of 40 without much real insight. It just looks like some of the thinking that went into Rocket Lake (backporting 10nm to 14nm ) where just kind of throwing stuff at the wall to see if it sticks because so freaked out about the competition. Smells like something cooked up by the marketing department and/or "nerd lust" rather than thoughtful engineering.

And probably running 40 cores or more also.

That isn't hard since they have already shown a 56 core count Xeon SP Gen 4 using "Intel 7". If get to Intel 3 and can't keep the same core count then something is wrong.

As stated above though.... 38 E cores. Errrr, I doubt that will work out like you are portraying it will on Windows. ( or Linux) for vast majority of workloads. Intel make be a tech porn benchmark king, but there is a pretty good chance lots of folks will opt out of buying those extreme SKU models.

They purchased at least 12 of the machines TSMC uses to make their 5nm chips.

Given that need those for Intel 4 and Intel 4 is suppose to volume ship in 2023 with the laptop Gen 14 ( Meteor Lake) aimed at laptops , that is actually a pretty low EUV machine count. That is why it won't be surprising to see the iGPU tile/chiplet outsourced to TSMC to unload the wafer consumption internally. And the mainstream GPU products to just sit on TSMC also for 3-5 years.

Intel underinvested in EUV equipment for 2-3 years and it will take at least 2-3 years to dig out of that hole.

This is not difficult rocket science. anyone that can afford the cost of those chip making machines TSMC uses and years of CPU knowledge like intel can make 3nm CPU's.

Intel has to "walk the walk" before they can talk about bragging. They've got no high volume EUV fab line running. Intel 4 is likely working but can they ramp to volumes needed to cover their laptop , server, HPC-GPU , and desktop needs? They have hit the wall a couple of times and peeled out tiles to TSMC.

Intel orders ASML system for well over $340 million in quest for chipmaking edge

AMSTERDAM : Intel has placed the first order with ASML for a new, advanced chipmaking tool that will cost "significantly" more than $340 million, as semiconductor manufacturers look to get ahead in a booming industry. Alongside better-than-expected fourth-quarter earnings, ASML said on Wednesday...

www.channelnewsasia.com

That is mainly about NA-EUV fab machines that won't be production ready until 2024-2025. It is an inflection point where Intel can possibly catch up but it does extremely little to fill the large "hole" in just 'plain' EUV fab machines volume that they just don't have.