TSMC: "The logic layout migration from N2P to A16 is actually quite straightforward because the cell structure and most of the layout patterns are quite the same. So, besides keeping the same front side structure, the beauty of A16 is that it inherits the NanoFlex feature from N2 ..."If they still use monolithic dies and reuse the one generation older Max design (as they did with M3 Ultra) they could redesign it for the A16 node while M7, M7 Pro, and M7 Max would get N2P.
TSMC is remarkably reluctant when it comes to A16 and mass production...
The progression from N2P to A16 is built into the 2nm architecture, by design. So Apple could use N2P for M7 and probably M7 Pro/Max, but for the server-grade silicon project Apple could use A16 and back side power delivery ("Super Power Rail"), starting from the M7-family designs. There's zero chance they would use an older design. M3 Ultra didn't change process nodes -- it is built using first-generation N3, just like the rest of the M3 family.
The unknowns are M5 Ultra and M6 Ultra. I get what you're thinking, that maybe M6 Ultra will lag behind the rest of M6 and there would be no M7 Ultra, but that doesn't fit with TSMC A16.
TSMC A16 is aimed at AI and HPC -- you're not going to see it in consumer products, but *if* Apple is building its own server/workstation silicon, it would be the time and place for a major stride forward.
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