Mac vs. Window's mhz

[cube]

The G5 is way more efficient than the G4. The G5 was perform 215 instructions per clock cycle vs 16 on the G4. HUGE difference there!

The G4 fetches upto 4 instructions per clock cycle. The G5, 8.

 

[Mord]

The G4 fetches upto 4 instructions per clock cycle. The G5, 8.

but the G5's pipeline is three times longer than the G4's, also altivec in the G5 lags a tad behind the G4.

not even if the G5 was 300 times faster would i let anyone pry my g4 cube from my cold dead fingers.

cant wait for 7448 upgrade cards 1MB full speed cache baby yeah.

 

[Platform]

pc shootout.com it adds 7mhz to mac, like 1.5 G4 is a 2.2 P4!! Ive heard from hardcore techies that is pretty accurate.

So a 2.7mhz G5 would be a 3.4 P4

People who graduate this and that uni with a computer degree often don't know anything at all about Mac's......this is from experience so this is incorrect

 

[Bad_JuJu]

The whole FSB is without doubt important, but let us remember that most of the current P4 chips being sold really only have a FSB of 200mhz which is only a 20% improvement over the present G4. Of course Intel says the FSB is 800mhz because of the whole 4 instructions per cycle, but that is only theoretical. The FSB is nowhere near 800mhz – it is most likely closer to 400mhz. The G4 should be able to move up to a 200mhz FSB with the 7448.

As stated above - you need to be careful on just stating specs of buses or cpu's - because they are based on simulations or mathematical calculations ...... not actual averages of activity during program and OS execution.

Without optimizations in compilers (tuned to the cpu's feature set) - and driver optimizations ---- GHz and bus speeds don't mean squat.

I worked in the group at Intel that developed the PCI spec. and the very first PCI motherboards --- I recall reading a PCWeek report about a high-end ISA (10Mhz) SCSI disk controller that out performed the newer PCI (133MHz) SCSI controller bottom line was the ISA controllers driver had been optimized for years to use every trick known to xfer data -- the PCI driver was a 1st generation piece of code on a new bus.

Same thing applies as to how efficient XP is on x86 (cache usage / thrashing) vs OS X on PPC -- and then you also need to look at memory page management - IO xfers + interrupt handling (both HW and OS)

 

[cube]

but the G5's pipeline is three times longer than the G4's, also altivec in the G5 lags a tad behind the G4.

not even if the G5 was 300 times faster would i let anyone pry my g4 cube from my cold dead fingers.

cant wait for 7448 upgrade cards 1MB full speed cache baby yeah.

The point was that the HUGE difference referred to was not as extremely great.

 

[jiggie2g]

no **** sherlock, this is for comparisons sake, there still are people out there that refuse to work on a computer unless it has "an intel inside"

AMD owns intel thats pretty established, and compareing the G5 to AMD cpus is dead easy, they are about the same on average clock for clock.

strangely enough most of my techie friends currently have 2.8GHz northwood p4's at the moment because a friend of mine got a crate of them for what came out as £50 each.

i also have not seen personally one good OC attempt on a K8, best i have seen is a winnie 3000+ at

Well On my Venice core 3000+ I can boot at 3ghz(334x9)+ upping the Voltage but is not stable , u need water or phase change. i've seen people keep Venice and San Diego Chips stable at 3.2ghz with Phase Change.

I have hit 2.7ghz on stock voltage and held it with Prime 95. I will keep it a 2.4ghz(3800+ speed) just for the sake of keeping things cool as i don't need all that speed. not bad for a $149USD chip.

 

[Mav451]

Damn dude. Since I'm done with finals, I've been contemplating the move to A64. Alot of people have success with CH-5 (pumping it to 3.2V) so I might not even have to upgrade RAM (only need CPU/Mobo/HSF/PSU). I presume you're running on TCCD (3200XL)?

Yeah, I just realized i need a new PSU fer PCI-E too...ehhh

*back on topic*
I think auxplage is confusing FSB with "effective FSB". Effective FSB is the one that is shown in benchmarks. Of course, higher FSB can only do so much (250FSB x 2 on Athlon XP vs. 250FSB x 4 on A64)...

(edit: Haha, I notice I said effective FSB...probably made it up from my geotech/soils class "effective stress" << ok, engineering joke over).

 

[Bad_JuJu]

back on topic*
I think auxplage is confusing FSB with "effective FSB". Effective FSB is the one that is shown in benchmarks. Of course, higher FSB can only do so much (250FSB x 2 on Athlon XP vs. 250FSB x 4 on A64).


This is true and Bmarks are a good tool to measure performance - but always keep in mind that they are "synthetic" in nature as they may/will perform operations that a normal user wouldn't do - or wouldn't do in that way or that quickly --- plus as has been said - its like comparing apples and oranges - ha ha ha ---- because you've got differnt OS's and HW

The closest thing I've seen to a cross platform Bmark was an Internet browsing Bmark that used code that was not optimized for either PPC or x86. Of course you would need to run the Bmark dozens of times and average it out to eliminate net based delays

 

[Mord]

I think auxplage is confusing FSB with "effective FSB". Effective FSB is the one that is shown in benchmarks. Of course, higher FSB can only do so much (250FSB x 2 on Athlon XP vs. 250FSB x 4 on A64

it's 200 x2 on the athlon XP and it was only the latter bartons that supported it, it was 166 x2 133 x2 and 100 x2 before it.

and the A64 is 200MHz on a 5x LTD multiplier on 939 and 4x on 754 (3x on a few early nvidia boards)

 

[Mav451]

it's 200 x2 on the athlon XP and it was only the latter bartons that supported it, it was 166 x2 133 x2 and 100 x2 before it.

and the A64 is 200MHz on a 5x LTD multiplier on 939 and 4x on 754 (3x on a few early nvidia boards)

Yeah, sorry about that. Had a brain fart while I was imagining what kind of overclocks I could be getting if I gave my Ch-5 more voltage. I guess we call that a Freudian?