CISC vs RISC
Originally posted by Dippo
I still think RISC is much better than CISC. CISC is reaching it's limitations while RISC still has some ground to go.
That's just my opinion, no real scientific data to back it up with.
Actually, I wouldn't be surprised if CISC made a comeback... x86 is a dog because of all the cruft, but the design goals of CISC may have benefits for different reasons.
CISC was designed in an era when memory was really expensive, so instructions were encoded to be dense. Compile a program for RISC and CISC and the CISC binary will be smaller.
RISC came around because the memory cost was starting to fade, but it was hard to speed up the CPU core. The simpler instructions meant a much simpler and more predictable execution core that could be optimized and clocked up.
Now silicon is cheap, and CISC architectures put a layer in front to break up CISC instructions to run on simpler, more optimized RISC hardware so it can be clocked up (and RISC architectures break up RISC instructions to run on even simpler RISC hardware).
As silicon gets faster, and more and more parallel execution units are placed on chip, execution through the core is no longer the limiting factor. In most cases, memory
bandwidth is becoming a bottleneck.
With the limitation becoming how many bytes you can push through the external bus, denser instruction sets have an advantage again. You can get more done with less memory fetches on a CISC architecture.
One way around bandwidth limitations is cache-- but cache is expensive like system RAM used to be so denser instructions have an advantage here as well (smaller programs fit better in cache).
The one major disadvantage that most CISC architectures have is variable length instructions-- they just don't align well with fixed length bursts out of modern memories, or fixed line sized caches.
None of this is meant to imply that Intel would be a good option (I'll address that separately), I'm just pointing out that the old "RISC is better" argument isn't as simple anymore...