MP All Models So no Thunderbolt 4??

Discussion in 'Mac Pro' started by high heaven, Aug 3, 2019.

  1. high heaven macrumors regular

    high heaven

    Dec 7, 2017
  2. AidenShaw macrumors P6


    Feb 8, 2003
    The Peninsula
    T-Bolt is joining FireWire on the scrap heap of (more or less proprietary) abandoned interfaces.
  3. high heaven thread starter macrumors regular

    high heaven

    Dec 7, 2017
    So TB3 will be replaced by USB 4.0, TB4 wont gonna be announced or updated because of DP 2.0?
  4. orph macrumors 68000


    Dec 12, 2005
    intel handed over TB to the USB guys

    so USB 3 is kind of being replaced by TB kind of

    still have mixed feelings about one port doing it all but at the same time not doing it all, kind of confusing when two cables look the same but do different things.
    the cables are never well market with what they do and the ports are never marked.

    never mind the renaming of USB3

    it is cool and a massive hellish mess at the same time

    A cable can be USB C but only USB 2 speed or be USB C and have display out but maybe the port is not and so on….

    I miss when life was simple
  5. ruslan120 macrumors 6502


    Jul 12, 2009
    Thunderbolt 3 is PCI Express 3.0 over a cable. 4 will come out a while after PCI-E 4.0 comes out. 5 with PCI-E 5.0, and so on, and so forth.

    As to what cable it will use, not sure, I haven’t read through the USB 4 spec to make guesses as to whether the cable will support it. I would guess that is the goal, to simplify things. and if it does happen, USB 4 will get just as confusing as USB 3 was with the different cable variations. should be great for backwards compatibility though.
  6. Pressure macrumors 68040


    May 30, 2006
    TB is not tied to a specific PCI-SIG version and they are not the same. What TB does is that it combines PCIe and DisplayPort signals as well as power delivery into one cable with the ability to daisy-chain peripherals.
  7. ruslan120 macrumors 6502


    Jul 12, 2009
    Apologies, you're right. To expand on my answer I meant that while TB is not necessarily tied to PCI-Express, the two have been following each other closely, and that the next iteration of PCI-Express will likely mean TB4.
  8. DPUser macrumors 6502a


    Jan 17, 2012
    Rancho Bohemia, California
    I had missed that announcement. Here' the Summary:

    Intel announced that it contributed the Intel Thunderbolt protocol specification to the USB Promoter Group, enabling other chip makers to build Thunderbolt compatible silicon, royalty-free. In addition, the USB Promoter Group announced the pending release of the USB4 specification, based on the Thunderbolt protocol. The convergence of the underlying Thunderbolt and USB protocols will increase compatibility among USB Type-C connector-based products, simplifying how people connect their devices.

    Doesn't sound like the scrap heap to me.
  9. aaronhead14 macrumors 6502a


    Mar 9, 2009
    Most PCs and Macs using USB4 will have Thunderbolt support built in, minus some lower end PCs. Thunderbolt is still very much a thing. Techquickie did a good job explaining it if you're confused:
  10. deconstruct60 macrumors 604

    Mar 10, 2009

    TBv4 probably depends upon what USB-IF does with weaving TBv3 into USB4. Just how optional it is and 'forked' it is from TBv3 will prove to Intel that it won't get chopped up into a dead end position with the factions in USB-IF who just want cheaper and are hyper about margins. For example, USB has a notion of hub topology. Thunderbolt pragmatically doesn't ( implemented as daisy chains only). USB-IF could force TB into hub context but that would probably drive up prices. Which some factions might persue in order to make it the pragmatically unaffordable option ( technically an option but few folks would buy it so it is an option convenient to skip. )

    DP v2.0 probably also has active cables for longer runs. Looking simply at the port shapes probably misses a major point. DP v2.0 is a fork though of TB. The speed increase is primarily coming from making the traffic unidirectional. Again if DP v2.0 and USB-IF can't work well with DisplayPort Alt mode then Intel could step in with a TBv4 that got along better with DP v2.0 (and up).

    Even without the USB4 'merge' TBv4 should have taken more time than the previous two. TBv3 came with a socket change. Too much change can kill a standard if there isn't enough momentum behind it. The TBv2 folks needed substantively priced adapters to keep up and sometime needed new equipment to fit in TBv3 space means Thunderbolt didn't need tons of change. Churning the waters fast is also not likely to get many folks to 'buy in" if go 'Open' standard because folks will see it as a way for Intel to maintain the lead because the inject changes faster than most can follow. Too fast can be as bad as too slow.

    If the merge largely goes OK then Intel won't do a TBv4. Evolution will happen inside of USB-IF governance. I think Intel is holding the TBv4 card as an incentive for folks to work collaboratively on this. If this is a "embrace, extend, extinguish" move by others then Intel (and probably Apple) can go back to previous approach outside of USB-IF.

    The key thing to look out for is who is signing up to be USB4 implementors besides Intel ? how far out are their controllers? For example, stories like this

    don't have direct quotes from shops like ASMedia , Fresco Logic or some of the other USB controller IP implementor design shops with quotes about how they'd have ealier demos "real soon now".
  11. orph macrumors 68000


    Dec 12, 2005
    TB now is on chip with new CPUs so it's not going anywhere, it's just an option for anyone to use when working with the intel platform and as it's now under the USB umbrela so it's not going anywhere, it's just one more of the USB option to be implemented.
    'On Wednesday, Intel announced it will integrate Thunderbolt 3 into future CPUs. More importantly, the company said it would open up the long-secret protocol to the world, royalty-free.'

    it was on at least one of the last gen threadriper mobo's, the 'X399 Designare EX' mobo

    TB is only pci gen-3 x4 and sometimes the 4 lanes are split over ports so i assume the next progresion will just be a move to x8 or x16 or more independent lanes but at the same time on consumer CPU’s there’s so few lanes im not sure how more than x4 can happen.
  12. deconstruct60 macrumors 604

    Mar 10, 2009
    It is on some 'ultrabook'/'Project Athena' laptop chips. it is unclear if even Intel is going to normalize that across most of the consumer line up (i.e., into the mainstream desktop ). It is quite unlikely to make it to the Xeon SP and W class CPUs. ( as there is no natural GPU to pair with ).

    No, it is not only this. Embeeding into the laptop iGPUs also inherently (and more cost effectively) gets couples the output from the that GPU into Thunderbolt output.

    TB has been discrete in part to be able to loop in discrete GPU output also. Embedding the controllers into the CPU die doesn't enable that. In fact, it gets in the way. ( Yet another indicator that this isn't going to be uniform across CPU product line ups. )

    Thunderbolt is basically in part a switch so this "split' is pretty what switches do.

    Errrr, technically no. that is quite unlikely.

    "... has 16 PCIe 3.0 lanes for external use, although there are actually 32 in the design but 16 of these are tied up with Thunderbolt support. ..."

    "... Each Ice Lake CPU can support up to four TB3 ports, with each TB3 port getting a full PCIe 3.0 x4 root complex link internally for full bandwidth. (For those keeping count, it means Ice Lake technically has 32 PCIe 3.0 lanes total). ..."

    Pragmatically what Intel has done with Ice lake it create two TB controllers internal to the CPU. The only shift is that now have two x4 inputs to the individual controllers. This both increases substantially on the individual port bandwidth and also cuts back a bit on the switching. I wouldn't bet the farm on that happening with discrete TB controllers that will be also evolve later.

    This is feed through the CPU package internal data bus so may not necessarily see a 4x increase in total aggretage data throughput if there is other major internal CPU traffic, but in bursts there should be a diffrence.

    In most cases (e.g. mainstream laptop/desktop CPU packages ) the PCI-e input lane budget is going to be smaller than that. The iteration at x4 PCI-e v4 ( or more) might get 'stepped down' into the two x4's here in this embedded version.

    Also more likely will see an extension of future discrete USB/TB controllers to do "all traffic going out" DisplayPort V2.0 "alternative" mode. Again this more so in context of being embedded integrated GPU context.

    see above.... at least where integrated. The key is avoiding more pin outs and trace running. In a narrow niche of "box with slots" than will see individual lane bandwidth bumps over time ( v4 then v5 ) that can be allowed. Again this limits pins and trace running.

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11 August 3, 2019