Thunderbolt 6!

[jimthing]

Q: Thunderbolt 6 – is there actually going to be a version 6?

What comes after Thunderbolt 5? (sarcasm aside...yes obviously version number "6", lol!)

Given the original Thunderbolt spec (aka "Light Peak") was aimed to reach speeds of 100Gbps over its lifespan of versions, and TB5 already does 80 or 120Gbps (depending on mode), is there another protocol or standard waiting in the wings to take over as the next connection standard? And will it (presumably) remain using the same USB-C as its connector, just as TB3 to TB5 use, too?

Or perhaps more likely, as the spec was made royalty-free and custodianship of the Thunderbolt protocol transferred from Intel to the USB Implementers Forum, perhaps Thunderbolt will be obsoleted as a term, with USB 5 (at whatever speed they can do next) taking over as 'the next port'?


If the dates of previous versions are anything to go by, it may arrive as early as 2027, hence asking the question now.
See below the dates of the previous versions (though sometimes Macs took another year afterwards to get the new ports):

YEAR	VERSION	CONNECTOR	SPEED	PCIe	OTHER
2011	TB1	miniDP	20 Gbit/s total (10 Gbit/s each channel)	2.0 ×4	DP 1.1a
2 years
2013	TB2	miniDP	20 Gbit/s total	2.0 ×4	DP 1.2
2 years
2015	TB3	USB-C	40 Gbit/s bidirectional	3.0 ×4	DP 1.2, USB 3.1 Gen 2
5 years
2020	TB4	USB-C	40 Gbit/s bidirectional	3.0 ×4	DP 2.0, USB4
3 years
2023	TB5	USB-C	80 Gbit/s bidirectional	4.0 ×4	DP 2.1, USB4
...
4/5 years (?)
2027/8 (?)	TB6 (?)	USB-C (?)	100/160/200 (?) Gbit/s bidirectional	5.0 ×4(?)	DP 2.1b (?), USB5 (?)

Just wondering if anyone more clued-up about such things can enlighten those of us less knowledgeable on this. Or otherwise, at least it might be an interesting speculation topic for the Apple geeks around here (me included, lol!).


EDIT: On the related topic, one has to wonder if optical Thunderbolt cables (all those typically over 3m max offered by copper) are ever going to arrive, as the last ones available were TB3 40Gbps ones (from Corning et al.).
No TB4 or TB5 optical cables have been released for sale thus far.

 

[joevt]

TB5 is 40 Gb/s per lane. 2 lanes per direction. Optionally 3 lanes for one direction + 1 lane for the other direction in asymmetric mode.

To understand where Thunderbolt might go after that, you might consider looking at other serial type communications standards such as PCIe:
PCIe 6 is 64 GT/s per lane.
PCIe 7 is 128 GT/s per lane.
PCIe 8 is 256 GT/s per lane.
https://en.wikipedia.org/wiki/PCI_Express

Or Ethernet:
https://en.wikipedia.org/wiki/100_Gigabit_Ethernet

 

[cbum]

Sorry, but what is the difference between GB/s and GT/s?

 

[maflynn]

Sorry, but what is the difference between GB/s and GT/s?

Here's what I found

• GT/s (Gigatransfers per second): The raw number of transfer operations or clock signals sent per second by a hardware interface. It counts every bit sent on the wire, including control and error-correction overhead bits.
• GB/s (Gigabytes per second): The actual amount of usable user data transferred per second. It translates the raw transfers into physical bytes after removing encoding overhead

I've only seen GT/s on a handful of YT influencers. For me GB/s makes more sense to my tiny brain

 

[deconstruct60]

Q: Thunderbolt 6 – is there actually going to be a version 6?


TB 4 .... USB 4 TB 5 .... USB 4 TB 6 ? ... USB 5?

Actually TB 5 is tecnically coupled to USB 4 version 2.0

Thunderbolt is driven directly by Intel ( it is just an Intel branding mechanism now) and USB baseline upgrades.

Intel has been about eye-ball deep in trouble the last couple of years. They have far ,f ar , far bigger 'forest fire' issues to fight than a new Thunberbolt. I wouldn't hold my breadth on a version 6 coming.

The RAM-apocalypse (and NAND and increasing SoC fab processing prices) probably puts USB on hold also. A major sub faction of the USB-IF committee don't like having to implement higher cost ports. Already have higher priced other components nobody wants. About nobody wants the systems to get even more expensive for the next couple of years.

Ab best might some small revisions from USB for a USB 4 version 3.0 that tweaked some optional stuff more standard. That might get a TB '5.5' or TB 5b, but I doubt a 6.

It looks like Intel is finally going to put TB 5 in the base SoC in 2027 "Nova Lake" SoCs. So even Intel had not fully adopted TB v5 across a major portion of their line up. There are probably not in any big hurry to have to try to chase something faster as a built-in for a while. AMD is doing about as little as possible to get to TBv5 and now control a substantively large portion of the PC market. Qualcomm ... no TB. Nvidia might grab more share ... again no TB.

The days of Intel making the PC market choke down a new port faster than they want are over. Apple has been incrementally dragged their feet on TBv5 across the line up also.

Might get TB '5.5' with more standardized RDMA , but I suspect that won't happen. However, if spun as a "getting on the AI clustering hypetrain' with sufficient effort maybe. [ Still... doubt AMD is going to 'buy into' that. They already have Ethenet RDMA components to sell (and so does Nvidia and Intel. ) .. ]

Just wondering if anyone more clued-up about such things can enlighten those of us less knowledgeable on this. Or otherwise, at least it might be an interesting speculation topic for the Apple geeks around here (me included, lol!).

'Thunderbolt' at this point is mainly USB N with less stuff optional. USB-IF usually leaves the more harder/more expensive features to implement as optional. Thunderbolt just makes it more uniform (mandates some features as required taking them off the 'optional' list. )

EDIT: On the related topic, one has to wonder if optical Thunderbolt cables (all those typically over 3m max offered by copper) are ever going to arrive, as the last ones available were TB3 40Gbps ones (from Corning et al.).
No TB4 or TB5 optical cables have been released for sale thus far.

The asymetrical mode of USB 4 version 2.0 (and TBv5) makes doing the optical more tricky (and expensive).
Have to be able to 'reverse' a lane. Or double up all the lanes and just underutlize 3 of them.

The problem generally though is how many system vendors are implementing USB 4 version 2.0?
I'm not sure AMD has moved to 'version 2.0'. And I think the asymetrical mode might technically be optional. If so even if do v2.0 may not do that. I think AMD is OK with advanced DisplayPort and HDMI connections.

Apple primarily wants THunderbolt as a one port wonder docking station connection. That means providing power. Optical doesn't do power which is a major reason it stopped being "Light peak".

Intel,AMD,Nvidia, etc are looking at photonics (optical ) to hook together nodes in clusters. I suspect that is where the most of Intel's 'optical' effort is going to go toward. Not consumer PC stuff. [ And AI driven "Spend money like drunken sailors'" is having impact in optical components world also.
https://www.tomshardware.com/tech-i...sphide-shortage-will-become-worse-than-memory
]


P.S. hidden behind a paywall

https://www.tomshardware.com/peripherals/usb/usbs-next-decade

 

[deconstruct60]

TB5 is 40 Gb/s per lane. 2 lanes per direction. Optionally 3 lanes for one direction + 1 lane for the other direction in asymmetric mode.

To understand where Thunderbolt might go after that, you might consider looking at other serial type communications standards such as PCIe:
PCIe 6 is 64 GT/s per lane.
PCIe 7 is 128 GT/s per lane.

It gets substantively harder because faster PCI-e standards typically come with shorter distance limits but Oculink x4-x8 with PCI-e v5 and maybe v6 just does better data bandidth to a PCI-e card. (e.g., discrete GPU.) . Apple has largely walked away from dGPUs. The rest of the PC market has not.

Oculink is no where near as common on general market PC sytems , but system deployment has gotten wider.

Displays that have more than one input connector can use a HDMI or DisplayPort to hook to an eGPU for the video output traffic. Oculink not carrying it does not matter.

Apple has more of a 'Display Docking Station' solution space focus.

Better Oculink makes the addressable solution space smaller for Thunderbolt. Oculink doesn't have to be a TB 'killer' to slow it down.

 

[joevt]

Sorry, but what is the difference between GB/s and GT/s?

See the notes section in the wikipedia page for PCI Express. It says:

Notes

1. In each direction (each lane is a dual simplex channel).
2. Transfer rate refers to the encoded serial bit rate; 2.5 GT/s means 2.5 Gbit/s serial data rate.
3. Throughput indicates the usable bandwidth (i.e. only including the payload, not the 8b/10b, 128b/130b, or 242B/256B encoding overhead). The PCIe 1.0 transfer rate of 2.5 GT/s per lane means a 2.5 Gbit/s serial bit rate; after applying a 8b/10b encoding, this corresponds to a useful throughput of 2.0 Gbit/s = 250 MB/s.

In the case of PCI Express, a transfer is a single bit on the wire.
For PCIe gen 1 and gen 2, it takes 10 transfers to encode 8 bits of data.
For PCIe gen 3, gen 4, and gen 5, it takes 130 transfers to encode 128 bits of data.
PCIe gen 1 to gen 5 use NRZ signals https://en.wikipedia.org/wiki/Non-return-to-zero
PCIe gen 6 uses PAM-4 https://en.wikipedia.org/wiki/Pulse-amplitude_modulation

Different versions of USB (from USB 1.1 to USB4 2.0 aka Thunderbolt 5) use different encodings https://en.wikipedia.org/wiki/USB

NRZ and NRZI use 2 diferrent levels in a single transfer so one transfer is a single bit.
PAM can use 3 or 4 different levels in a single transfer. So multiple transfers are used to encode multiple bits.

If PAM 3 use 3 levels, then 2 transfers encodes 9 different values, 3 transfers encodes 27 values, 4 transfers encodes 81 values, etc.
The USB wikipedia page says 7 transfers encodes 11 bits of data.
3^7 = 2187
ln2(2187) = 11.095 bits per 7 transfers.
ln2(3) = 1.585 bits per transfer.

For PAM 4, one transfer is at most 2 bits. For PCIe 6, some bits are used for FEC (forward error correction).

 

[jimthing]

Thanks for the info. Good though all the above background info is, it doesn't really answer the central question of what's next?

Sure whatever it is may be delayed, and sure no organisation may be interested in the short term. But something has to come next at some point, as <companies: eg. Apple> always have to sell us 'the next big thing'.

From the sounds of things, no one (publicly) knows. Oh well.

 

[EugW]

What I would find even more exciting as a next step is A-series SoCs getting USB 4. That would make for a killer MacBook Neo. 2030 or later?

 

[theorist9]

TB5 is 40 Gb/s per lane. 2 lanes per direction. Optionally 3 lanes for one direction + 1 lane for the other direction in asymmetric mode.

To understand where Thunderbolt might go after that, you might consider looking at other serial type communications standards such as PCIe:
PCIe 6 is 64 GT/s per lane.
PCIe 7 is 128 GT/s per lane.
PCIe 8 is 256 GT/s per lane.
https://en.wikipedia.org/wiki/PCI_Express

Or Ethernet:
https://en.wikipedia.org/wiki/100_Gigabit_Ethernet

Following this idea, I asked ChatGPT 5.6 Sol to create a speculative table. Here's what it came up with by assuming that TB6 would be matched to the next PCIe generation in the Thunderbolt progression (5.0), and that the ratio of PCIe/TB bandwidth for TB6 would be the same as it was for TB2 through TB5:

It added the following:

"So an eventual next-generation combination of approximately

PCIe 5.0 ×4 → 128 Gb/s PCIe → 160 Gb/s Thunderbolt

would be very logical.

But I would not call it a prediction with high confidence, because the Thunderbolt number is ultimately constrained by the external cable PHY, not by PCIe. Intel could, for example:

• move to PCIe 5.0 ×4 while retaining an 80-Gb/s external link for some generation;
• choose some external rate other than 160 Gb/s;
• change the lane architecture or encoding;
• wait for a future USB4 revision before defining the next Thunderbolt generation;
• or make another TB3→TB4-style generation that improves requirements/features without doubling the PHY rate."

 

[drrich2]

I've only seen GT/s on a handful of YT influencers. For me GB/s makes more sense to my tiny brain

It's hard enough to keep the 'b' (bits) and 'B' (Bytes) in Mbps/MBps straight, especially since it's not a 10-base conversion (guess the metric-folks didn't get to rule?). Then there's the M (mega) vs. G (giga); please don't give us yet another unit speed abbreviation to juggle.

While TB 6 would be interesting in a 'faster is always better' way, how much demand is there? How many people would benefit?

Now, once your SSD's cache exhausts, an external TB5 drive's speed can drop substantially. I assume TB 6 would have the same issue, if you're moving massive files.

Networking influencers seems to still consider 10 Gbps ethernet 'blazing fast,' and adequate for people editing video.

I don't get the sense Apple is keen to encourage people to make an external drive their startup (and main) disc, though it can be done.

Gen. 5 SSDs are more expensive, and right now SSD prices are...ridiculous.

EDIT: On the related topic, one has to wonder if optical Thunderbolt cables (all those typically over 3m max offered by copper) are ever going to arrive, as the last ones available were TB3 40Gbps ones (from Corning et al.).
No TB4 or TB5 optical cables have been released for sale thus far.

Apple primarily wants THunderbolt as a one port wonder docking station connection. That means providing power. Optical doesn't do power which is a major reason it stopped being "Light peak".

This all raises the question of whether 'the next big thing' (whatever it is) in high-speed data transmission will be something other than Thunderbolt, not a new iteration.

At the Thunderbolt 4 speed class, some Cat. 8 ethernet cable could fill the bill...if you had devices with ethernet capabilities that could take advantage of 40-Gbps speeds. If you don't need power delivery (and hey, there's POE - Power-Over-Ethernet if you do!), that could be much longer and more cost effective vs. Thunderbolt cables.

Beyond that, what about fiber? Maybe the next big thing isn't Thunderbolt at all.

 

[benholt]

TB5's asymmetric mode is barely being used yet. Most docks and enclosures ignore it and just run symmetric 80. My M2 Ultra was already fine on TB4, and on the M3 Max MBP I've got an OWC Envoy Pro FX plus an Apple Studio Display on one port and still can't tickle the ceiling on anything real. Speccing TB6 before TB5's asymmetric headroom is even mapped in shipping product feels like Intel roadmap talk, not user pull.

The optical piece a couple posts up: TB3 optical (Corning) died because bus power dropped off the wire — the fibers only carried data, so any powered peripheral on the far end needed its own brick. Any future spec has to keep 15–100W over the same cable to survive the MacBook single-cable dock use case, and that's a copper problem. Fully-optical only happens if USB-PD gets split from the data link, and nobody's proposed that.

 

[deconstruct60]

What I would find even more exciting as a next step is A-series SoCs getting USB 4. That would make for a killer MacBook Neo. 2030 or later?

The 'plain' An and An Pro are now two different dies. It is doubtful that the 'plain' An sequence gets USB 4 (and if it did it would be 'v1' not 'v2') will come to phones.

USB 3 has a baseline power output requirement of 4.5W .
USB 4 cranks that up to 7.5W ( 4 v2 pragmatically makes 100W more common with optional upper limit around 240W )

There is very likely going to be very little interest in adopting a port that requires a lmited battery phone to crank out more wattage through the port. It is a dual edged issue. Might be interested in higher power in limits, but also comes with mandates for higher power out.

USB 3 gen 2 is already fast enough to dump current resolution video camera output to an attached drive.

Well, see what Android Desktop does. If there was a much higher demand for a phone to take over all the duties of a laptop then perhaps folks would have wider needs for a faster port that did everything ( dock to a large screen monitor with KVM and have a 'PC". ). If the faster speed always comes coupled to being docked and getting a steady power in then it would generally work. But once go up also have to statify context when someone in moible mode plugs in a USB 4 device with the higher power draw.

The ports are fragemented. Pretty likely Apple will slow-motion move TBv5 down 'plain' M-series also. The iPad Pro doesn't really want to support 50-100W device expectations either.

 

[deconstruct60]

It's hard enough to keep the 'b' (bits) and 'B' (Bytes) in Mbps/MBps straight, especially since it's not a 10-base conversion (guess the metric-folks didn't get to rule?).

there are only two digits in binary bits; '0' and '1'. So there are not 10 things to count. Base 2 is going to rule because those are the only two bits you got. 2^2 = 4 , 2^3 = 8 , 2^4 = 16 , etc.

PAM 3 uses 'three states' for signaling. PAM 4 uses 'four states' for signaling. Things get much messier as try to crank that higher, so not likely to get to '10' there either.

Then there's the M (mega) vs. G (giga); please don't give us yet another unit speed abbreviation to juggle.

While TB 6 would be interesting in a 'faster is always better' way, how much demand is there? How many people would benefit?

faster isn't better if can't afford it. There is no unidimensional metric here when measuring demand.

PAM-3 was picked in part for Thunderbolt 5 because PAM-4 starts to exhibit lower signal-to-noise ratio. That means have add more stuff to 'recover' a decent signal over longer distances. If Thunderbolt 6 came and the cable length shrank 30% or got 40% more expensive would people still want that 'faster'?

This all raises the question of whether 'the next big thing' (whatever it is) in high-speed data transmission will be something other than Thunderbolt, not a new iteration.

" ... OCuLink stands for Optical Copper (Cu = chemical symbol for copper) Link and is an externalized connection technology ..."

What Is OCuLink: A Beginner's Guide

Most of us understand USB as a connection, but recently, OCulink came into the limelight. Its excellent data transfer capability shines in applications

www.optcore.net

OCulink has some traction inside of servers. Short distances inside of a server case and cost considerations cause the 'optical' part to be dropped. The growing interest in adding photonics drivers onto server SoC dies is making that electrical-to-optical overhead perhaps less important. And if more internal short distance optical links probably brings those short optical cables down also. So the optical part may come back with the costs get lower over a very long time period. However, short to intermediate term servers going more optical is likely to just also be more expensive.

Thunderbolt being very tightly coupled to USB means there is lots of expectations and requirements that loads that down. USB has the vastly larger deployment size, but that is a dual edged sword.

The folks on the far , bleeding edge fringe of 'high-speed data transmission' generally do not want to aggregate multiple data encodings onto a single connection. They want the one they picked to just go faster. If that means tossing 'plug-and-play' and 20+ year backward compatible... that is OK.

OcuLink has a hiccup coming with PCI-e v6 if they try to 'cover' that. That may bring optical back in to the implementations. PCI-e v6, 7 , etc are heading toward tighter distance constraints to get to faster bandwidth. Kind of the opposite of trying to hook up distance external boxes to a PC.

At the Thunderbolt 4 speed class, some Cat. 8 ethernet cable could fill the bill...if you had devices with ethernet capabilities that could take advantage of 40-Gbps speeds. If you don't need power delivery (and hey, there's POE - Power-Over-Ethernet if you do!), that could be much longer and more cost effective vs. Thunderbolt cables.

not sure Ethernet at 40+ is delivering lower costs. ( Thunderbolt being directly implement on the SoC package means the costs are spread over all the chips with that design. Ethernet is still mainly a 'bolt on' for consumer PC space. )


Thunderbolt v5 puts 64Gb/s of PCI-e onto the 80Gb/s link. There could be a 'v5.5' that bumps that with perhaps some PCI-e v4 bifurcation of x4 + x2 and perhaps be able to route the x4 to one device and another x2 to a different device on the daisy chain if there was no video at all going on. It is more of a 'corner case' add than something 'way faster'.

Another set of candidates for a 'v5.5' is more security (especially if exposed holes have appeared).

 

[deconstruct60]

But I would not call it a prediction with high confidence, because the Thunderbolt number is ultimately constrained by the external cable PHY, not by PCIe. Intel could, for example:

• move to PCIe 5.0 ×4 while retaining an 80-Gb/s external link for some generation;

If they bumped the Thunderbolt lanes from 40Gb/s to 50Gb/s (instead of doubling) then aggregate would be 100Gb/s. They would be shaving the 'top' off that PCI-e v5 x4 120Gb/s but at least would be close to being able to drive a 100GbE card at full speed. Staying at 80Gb/s leaves about 33% of the performance blocked.

Oculink would need more retimer/redrivers to cover PCI-e v5 x4 but already has optional x8 PCI-e v4 which is same aggregate bandwidth as x4 v5. A TB soution that is 33% slower (and the additional latency overheads) isn't going to win over speed freaks focused on max bandwidth.


There are some 200GbE over copper implementations that drive 4 50Gb/s with PAM-4 for about 3 meters, but if look at those per-port costs, those are not 'Thunderbolt' pricing ( or anything close to USB4 port prices. )

A more straightforward change would be the the PCI-e allocation requirements. I think technically TBv6 is "up to 64GB/s" per port. Which leaves an optional x4 PCI-e allocation being shared between two ports with a common controller. If mandate each port gets their own then it will be more uniform across systems and the downstream stuff doesn't really change much. Even though Thunderbolt v5 is USB 4 v2.0 with less optional stuff. There is still some substantive 'optional stuff' still there.

 

[jimmy_john]

Anyway TB6 can't get here soon enough. TB5 is throttling network performance on the Atto 5102.

Or Apple could just build workstations again.

 

[deconstruct60]

Anyway TB6 can't get here soon enough. TB5 is throttling network performance on the Atto 5102.

In the Mac space, those are pragmatically sold as 'faster than 10GbE" solutions (and the dual port skewed toward redundant and/or segmented networking). Throttled at 60 or two 30Gb/s it is still faster than 10GbE.

Even the aggressive TBv6 speculation up above of 128Gb/s isn't going to drive both ports there at 100GbE.

Or Apple could just build workstations again.

Don't hold your breath. Apple is still shipping Macs with 1GbE. A standard defined in the previous century... and yet Apple thinks that is 100% perfectly viable now.

It appears Apple generally thinks that 10GbE is 'super duper' fast for almost everyone. And 40GbE is coverage for most of the rest. Bypassing the 100GbE switches is way cheaper for a four node Mac RDMA cluster (as yet another corner case to lower the number of folks left outside their limits. )

Even Apples Private Cloud compute servers don't have more 100+ GbE ports than this ATTO 5102 device. (two high speed ports and two more Base-T ports likely for the control/management independent network. Each 'slice' inside the box gets one of each.

 

[theorist9]

TB5's asymmetric mode is barely being used yet. Most docks and enclosures ignore it and just run symmetric 80. My M2 Ultra was already fine on TB4, and on the M3 Max MBP I've got an OWC Envoy Pro FX plus an Apple Studio Display on one port and still can't tickle the ceiling on anything real. Speccing TB6 before TB5's asymmetric headroom is even mapped in shipping product feels like Intel roadmap talk, not user pull.

IMO, while the current use case for hypothetical TB6 is weak for docks, it would provide a real current benefit for those needing fast external storage.

And the reason TB5's asymmetric 120-out/40-in mode isn't used to accelerate SSD enclosures isn't because SSDs couldn't benefit from more write bandwidth. Rather:

(1) The 120 Gbps and 80 Gb/s limits are for video plus data together. When you're talking about data alone, such as you'd see with an SSD enclosure, then you're typically restricted to TB5's PCIe 4.0 ×4 tunneling path, which is limited to 64 Gb/s bidirectionally, regardless of whether Bandwidth Boost (Intel's marketing name for 120/40) is used.

I.e., Increasing the outgoing speed to 120 Gb/s would not change the write speed for data, which is separately capped at 64 GB/s.

(2) More generally and fundamentally, even if you could do asymmetric 120-out/40-in for external SSD enclosures you likely wouldn't want to because, for many use cases, you'd get a net decrease in overall performance because asymmetric would harm the read speed.

In summary, asymmetric mode is absent from current enclosures for reasons unrelated to the bandwidth capabilities of the SSDs themselves.


*****
As for the docks, while most may indeed ignore it, OWC and CalDigit Both offer Bandwidth Boost on their TB5 docks, enabling the following:
Mac → one TB5 cable → TB5 dock/display → multiple high-resolution/high-refresh displays
... but I've no idea how often such a configuration is used in practice.

 

[EugW]

The 'plain' An and An Pro are now two different dies. It is doubtful that the 'plain' An sequence gets USB 4 (and if it did it would be 'v1' not 'v2') will come to phones.

USB 3 has a baseline power output requirement of 4.5W .
USB 4 cranks that up to 7.5W ( 4 v2 pragmatically makes 100W more common with optional upper limit around 240W )

There is very likely going to be very little interest in adopting a port that requires a lmited battery phone to crank out more wattage through the port. It is a dual edged issue. Might be interested in higher power in limits, but also comes with mandates for higher power out.

USB 3 gen 2 is already fast enough to dump current resolution video camera output to an attached drive.

Well, see what Android Desktop does. If there was a much higher demand for a phone to take over all the duties of a laptop then perhaps folks would have wider needs for a faster port that did everything ( dock to a large screen monitor with KVM and have a 'PC". ). If the faster speed always comes coupled to being docked and getting a steady power in then it would generally work. But once go up also have to statify context when someone in moible mode plugs in a USB 4 device with the higher power draw.

Actually I was talking about Ax Pro chips getting USB 4 support for use outside of iPhones, hence the reference to the MacBook Neo.

 

[deconstruct60]

Actually I was talking about Ax Pro chips getting USB 4 support for use outside of iPhones, hence the reference to the MacBook Neo.

I presumed you might have meant the Pro , but that wasn't what you said. The A-series covers the collective not a subset.

 

[theorist9]

One way we could get higher data transfer speeds for external SSDs with TB5 Macs is if the first of these happens, and if the second of these applies:

(1) ASMedia releases a USB4 v2 peripheral controller based on the 80 Gb/s technology that it's demonstrated (see https://www.asmedia.com.tw/news-main/260605.html) and gives it a PCIe 5.0 interface rather than the PCIe 4.0 ×4 interface used by Intel’s current TB5 accessory controller. That could remove the present 64 Gb/s PCIe-side bottleneck and allow SSD traffic to make substantially greater use of the 80 Gb/s USB4/TB5 link—potentially yielding roughly 7.3–7.7 GB/s in practice rather than today’s roughly 6–6.5 GB/s.

(2) The USB4 v2 hardware already present in TB5 Macs is capable of tunneling PCIe traffic at rates above 64 Gb/s. Whether current Apple TB5 hardware can do this is presently unknown.

 

[drrich2]

There may always be demanding use case scenarios where a big jump in speed makes a noticeable difference in workflow completion and general 'snappiness.'

That said, I wonder at what point the differences become fairly negligible for most mainstream home computer users. Even there, things don't always happen instantly - one of the first thing I do when encountering a new Mac with a rep. for 'blazing fast' speed is double click the Microsoft Word icon to see how fast it opens.

So, let's say someone makes an external SSD drive their Startup Disc and operates off that as though it were their Mac's internal drive. I wonder what % of mainstream Mac users would notice if their drive was TB 4 vs. 5 right now? And what % would benefit meaningfully from TB 6?

Gotta wonder how much more expensive TB 6 cables would be, too.

 

[deconstruct60]

One way we could get higher data transfer speeds for external SSDs with TB5 Macs is if the first of these happens, and if the second of these applies:

(1) ASMedia releases a USB4 v2 peripheral controller based on the 80 Gb/s technology that it's demonstrated (see https://www.asmedia.com.tw/news-main/260605.html) and gives it a PCIe 5.0 interface rather than the PCIe 4.0 ×4 interface used by Intel’s current TB5 accessory controller. That could remove the present 64 Gb/s PCIe-side bottleneck and allow SSD traffic to make substantially greater use of the 80 Gb/s USB4/TB5 link—potentially yielding roughly 7.3–7.7 GB/s in practice rather than today’s roughly 6–6.5 GB/s.

Is that additional PCIe backhaul bandwidth for transported PCIe or for USB 3T?
Also is that a single port controller or two port? ( the picture in the dem room has ne backhaul link coming out of the chip and three other links coming out . Each link is of a different type so that could be representative of just the types or could be that this is a 2 ( or more ) controller . So 2-3 ports only suck up x4 PCIe )
The illustration is not suggestive of an actual PHY chips for a single port. That more so looks like a TB controller than a PHYS chip.

If selling this to Windows PC folks they probably not keen to give up x4 PCie lanes per port. X4 v5 lanes switched down into 2 x4 v4 worth of bandwidth. The rest of press release is about their advances in switch work. Could be the switch inside the TB controller is the tie in.

(2) The USB4 v2 hardware already present in TB5 Macs is capable of tunneling PCIe traffic at rates above 64 Gb/s. Whether current Apple TB5 hardware can do this is presently unknown.

Did anyone get around to measuring the raw data throughput of Apple’s RDMA TB solution ?

 

[throAU]

We already have 800-1600Gb connections in the networking world, its only a matter of time before it trickles down to consumer with thunderbolt.

The market is limited though, the average consumer is running out of tasks to push IO that fast to be worth it just yet.

 

[deconstruct60]

We already have 800-1600Gb connections in the networking world, its only a matter of time before it trickles down to consumer with thunderbolt.

Over a x4 PCIe link ? Probably not. The backhaul on Thunderbolt likely isn’t going to be x16 wide like widths.