No roadmaps go beyond 3nm. The trouble, aside from increasing manufacturing challenges, is that quantum effects start to dominate and the transistors don’t behave like they used to at larger geometries. Modern transistor modes have hundreds of device parameters that attempt to track all the relevant physical parameters that affect their performance on modern nodes.
The width of a silicon atom is 0.2 nanometers, so we are talking transistors with features in the tens of atoms already. There is a real physical limit, even if the quantum effects weren’t in play. This is why there are efforts to find a replacement for silicon that allows circuits to switch faster. There are already materials out there, but they cannot be manufactured on the same scale and density as the current CMOS processes.
3DIC techniques tackle it from the energy per bit angle by making the interconnects closer together, making them easier to drive between interfaces, and thus, able to drive faster. Thermal management techniques will also help because heat has a negative influence on transistor performance, and thus, speed.
