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Tom.Tom

macrumors member
Original poster
Jul 26, 2020
83
31
Hi,

I've been looking for the way, to use OpenCore to make a permanent PCI registry change to make Windows 10 work on C2D iMac 10.1. The issue is that Win10 reboots after the nVidia driver is loaded for Geforce 9400.

I can make Windows work fine by manually modifying proper PCI registry values in EFI Shell, but I'd like to make it with OpenCore. Could anyone provide some advice please.

This is the original post explaining the registry modification with EFI Shell.

Thanks,
Tom
 
I've been looking for the way, to use OpenCore to make a permanent PCI registry change to make Windows 10 work on C2D iMac 10.1. The issue is that Win10 reboots after the nVidia driver is loaded for Geforce 9400.

I can make Windows work fine by manually modifying proper PCI registry values in EFI Shell, but I'd like to make it with OpenCore. Could anyone provide some advice please.

This is the original post explaining the registry modification with EFI Shell.
Can Open Core load the UEFI Shell as a driver? Give it a unique name in the drivers folder. Then the UEFI Shell can run the startup.nsh script that has the commands. Normally the UEFI Shell is an app, so maybe loading it as a driver won't work. Even if it works, the problem with this method is that the commands are hard coded and require the PCI devices to always be in the specified slot.

I think you need to write an EFI driver to do the job. Then OpenCore can load the EFI driver. Or you could create a quirk in OpenCore. Both methods require creating code that runs in EFI.

I made FixPCIeLinkRate.efi to find any PCI downstream bridges that were running at less than the best PCIe link rate and try to retrain those to the best link rate. It also can list all the devices like pcitree.sh does in Linux or macOS if you run it manually in the UEFI Shell.
 
@joevt hmm, I was hoping this should be possible via the OC DeviceProperties section or the DSDT?
 
... and by the way - in Imac the devices will alwaysyhave the same PCI location
 
@joevt hmm, I was hoping this should be possible via the OC DeviceProperties section or the DSDT?
The commands set the Bus Master, Memory Space, and I/O Space bits of the Command Register of the GPU and the VGA Enable bit of the Bridge Control Register of the PCI Bridge.

Device Properties and DSDT can refer to those PCI devices, but I don't know if they can set the bits.

If it's possible with Device Properties then OpenCore Reference Manual would say something about that. It seems like it can only set properties.

It's probably possible with DSDT. Read the ACPI spec including the ASL section. For a device, you define an OperationRegion of type PCI_Config starting from a PCI config register offset and size in bytes. Then you define the list of fields for that operation region with sizes in bits and offsets in bytes. Then you can assign values to the fields in a method. I'm not sure what method to use, maybe _INI (Initialize) ? I'm not an ACPI expert. You can check your Mac's current DSDT for examples. My MacPro3,1 has this example:
Code:
            Device (P0P9)
            {
                Name (_ADR, 0x00090000)  // _ADR: Address
                OperationRegion (PCTL, PCI_Config, 0x48, 0x04)
                Field (PCTL, ByteAcc, NoLock, Preserve)
                {
                    Offset (0x01),
                    HPGE,   1,
                    Offset (0x02),
                    Offset (0x03),
                    Offset (0x04)
                }

                Method (_INI, 0, NotSerialized)  // _INI: Initialize
                {
                    If ((BPHP != 0x05))
                    {
                        HPGE = 0x01
                    }
                }

Device P0P9 is at device 9 function 0 (specified by _ADR) under device PCI0 which is the PCI host controller. It's full path is \_SB.PCI0.POP9
It defines a field HPGE which is bit 0 of PCI config register 0x49 (the OperationRegion is four bytes starting at 0x48 and HPGE is at offset 1 inside that region). Then the _INI method sets the HPGE bit if BPHP is not 0x05.
 
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