I’ve seen some discussion of this but I wanted to ask. Wikipedia seems to indicate that SoC “almost always includes” system memory.
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Will Mac SoC include the memory in the SoC?
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I think ARM Macs may deviate from the strict definition of SoC by including a baseline amount of memory onboard (say 8 GB) and allowing expansion offboard.
This allows Apple to have just one SoC for each performance level rather than 3 versions for 8, 16, 32.
This allows Apple to have just one SoC for each performance level rather than 3 versions for 8, 16, 32.
It's sort of a terminology trap. SoC is System on a Chip. To be a "System" it needs memory, so to have the system on a chip the memory should be included as well. But that's not to say I think it will be the case for (all) Apple's Mac chips. In fact I think it may be more appropriate to take a term from AMD and consider them APUs (Accelerated Processing Units). The A12Z used in the DTK even uses standard system memory, even though the iPad version of the chip uses on-package memory (I believe). Which actually surprised me a little because it means they already have a memory controller on the A12 capable of running DDR4 memory
I wouldn't rely on Wikipedia for anything more than information on a pop culture reference. There's too many instances of legitimate information being replaced by junk to even view it as a credible resource. Second, you said "almost always includes", so it is not an absolute requirement that the memory is contained within the SoC. The DTKs have to have external memory to hit that 16GB mark, and it's probably some sort of jury-rigged solution (which could also explain why disassembly of the DTK is expressly prohibited in the Developer agreement.) They may have patched in an external DDR4 memory controller to the A12Z, unless they actually built one into the A series for a while now and just never activated it.
Assuming that the DTK is using the iPad Pro A12Z which has 6GB of RAM already integrated into the SoC, I think it is likely they got to 16GB by having 10GB of external memory probably using some sort of special high speed connection so that you get speed - albeit not the speed of having the RAM on the die.
This may in fact be one reason that Apple has repeatedly said the Mac SoCs will be a new family - it probably has to do in part with adding a ton of RAM to the SoC.
This may in fact be one reason that Apple has repeatedly said the Mac SoCs will be a new family - it probably has to do in part with adding a ton of RAM to the SoC.
I also shouldn’t rely on forum postings, but this is as low stakes as a pop culture reference for my purposes ( if you were a journalist you shouldn’t rely on Wikipedia as a primary source for a pop culture reference either, if we really need to resolve and drill down on this further).
I actually disagree a bit. Wikipedia is amazing. Don't rely on it blindly, but if you look at the references below and it's well filled out and you have a quick look at the actual sources, Wiki is an excellent starting point, and I even use it academically for university work; Obviously not as a cited source, but as a starting point for getting primary sources, as well as a repository of mathematics I might need and code design patterns. Especially on technology and computing, Wikipedia is excellent.
And Wikipedia is perfectly correct that an SoC will generally speaking contain on-package or on-die memory. And the reason for it not being a set-in stone rule whether it has it or not is that the term itself is only loosely defined even within the industry. Modern Intel/AMD chips share many characteristics that were first under the definition of SoCs as well though most people wouldn't define them as SoCs. But they often have a built-in GPU and I/O controllers and features previously on North and South bridges have been taken into the CPU die itself. If I am correct in my expectations of what Apple Silicon Macs will be, as I stated earlier, I wouldn't even call them SoCs, but rather use AMD's term, APU
- But none of this is that strictly defined.Don’t disagree, it’s very simple that it shouldn’t be a primary source if something is at stake.
I’m interested in the RAM piece in particular because I’m curious how pervasive 16gb will be. On a MacOS there’s very little reason to have only 8gb of DDR, since DDR is so cheap (other than someone on a tight budget that falls into many makers wild up charge costs of 8gb of RAM in a laptop
What I said was that I disagree that Wikipedia shouldn't be used and semi-trusted. As I also stated it should not be used as a primary source, but a good Wiki article contains its references at the bottom so you have all the primary sources to go look at right there
I am not aware of any modern SoC (phone or PC) that has memory included on chip. I also don’t know how that would even work. System memory is built from chips sourced from one of few specialized memory vendors. SoC‘s usually include very fast on-chip cache memory though.
All their existing A-series SoCs includes the RAM.
"The A13 Bionic has an Apple part number APL1W85. It is a Package on Package (PoP) with both the A13 Application Processor and the Samsung K3UH5H50AM-SGCL 4GB LPDDR4X SDRAM, with the same 4GB DRAM capacity as the previous iPhone Xs Max from last year."
Apple iPhone 11 Pro Max Teardown | TechInsights
Posted: September 23, 2019 - Updated: October 1, 2019 Contributing Authors: Daniel Yang, Stacy Wegner, Albert Cowsky
It is possible that Apple will not place all the RAM on the SoC but I have always though that all the RAM will be included, especially since they said the CPU and GPU will share memory.
It is my understanding that the SoC is packaged together with the RAM (they are stacked on top of each other), but the RAM is not part of the chip itself. I guess it all depends on your terminology. As far as I know, SoC wold usually refer to the A13 chip itself, not the entire stacked package. If you want, the RAM is under the SoC and is connected to it using electrical wiring.
On the phone, they can use a stacked package since all phones come with the same amount of RAM, and the space is limited. A computer will need much more RAM though, not to mention that the RAM capacity needs to be configurable. A more traditional PC design, with RAM chips being besides the SoC probably makes more economical sense here. For unified memory, it doesn’t matter much where the RAM is located physically.
All their existing A-series SoCs includes the RAM.
"The A13 Bionic has an Apple part number APL1W85. It is a Package on Package (PoP) with both the A13 Application Processor and the Samsung K3UH5H50AM-SGCL 4GB LPDDR4X SDRAM, with the same 4GB DRAM capacity as the previous iPhone Xs Max from last year."
Apple iPhone 11 Pro Max Teardown | TechInsights
Posted: September 23, 2019 - Updated: October 1, 2019 Contributing Authors: Daniel Yang, Stacy Wegner, Albert Cowskywww.techinsights.com
It is possible that Apple will not place all the RAM on the SoC but I have always though that all the RAM will be included, especially since they said the CPU and GPU will share memory.
The PoP is not the SoC. The RAM is in the package, but is not part of the SoC. The SoC is the CPU/GPU/caches/buses, etc. Doubtless it will be the same deal with the Apple Silicon. It makes no sense to include DRAM on the SoC - a fab process optimized for digital logic is not optimized for DRAM (and vice versa), plus DRAM takes a ton of room. Because of that, you actually can get better performance by stacking, since 3D allows shorter connections Than you might get if the DRAM is next to the SoC on the same plane. That said, it is certain that at least the first couple of levels of cache memory are on the SoC. Since most memory accesses are satisfied by the caches (which are typically static, not dynamic, RAM), there is even less reas on to worry too much about the location of the DRAM.
All their existing A-series SoCs includes the RAM.
"The A13 Bionic has an Apple part number APL1W85. It is a Package on Package (PoP) with both the A13 Application Processor and the Samsung K3UH5H50AM-SGCL 4GB LPDDR4X SDRAM, with the same 4GB DRAM capacity as the previous iPhone Xs Max from last year."
Apple iPhone 11 Pro Max Teardown | TechInsights
Posted: September 23, 2019 - Updated: October 1, 2019 Contributing Authors: Daniel Yang, Stacy Wegner, Albert Cowsky
It is possible that Apple will not place all the RAM on the SoC but I have always though that all the RAM will be included, especially since they said the CPU and GPU will share memory.
"Package on Package" - which means the SoC (A13) and RAM are stacked together. Notice how they describe that chip:
"Apple A13 APL1W85 PoP (A13 AP+Samsung K3UH5H50AM-SGCL 4GB LPDDR4X SDRAM)" - meaning the A13 PLUS the Samsung RAM.
Apple has been soldering the ram on Macbooks for years now, they will not give up the chance to blame moving to SoC for not being upgradeable anymore. I would be surprised if they didn't move away from the technically replaceable pcie SSD sticks and have ram and storage soldered on the logic board like the iphone and ipads.
Apple will incorporate the first 16GB of RAM on the SoC. Any more RAM being optioned gets soldered to the logic board.
Apple has been soldering the SSD flash chips onto the logic boards for a few years now, except for the Mac Pro.
Apple has been soldering the SSD flash chips onto the logic boards for a few years now, except for the Mac Pro.
If they do put RAM on the SoC, it will be interesting to see how it's set up as channels/bit widths.
Could even do a triple-channel controller with the one channel allocated to onboard and the other two external. Upgrading RAM then gives you more capacity and bandwidth.
Could even do a triple-channel controller with the one channel allocated to onboard and the other two external. Upgrading RAM then gives you more capacity and bandwidth.
Putting RAM on the SoC is completely pointless, as @cmaier explained. RAM takes a lot of space and there is no sense in making it as the same process as the logic chip. Package stacking make more sense, but given the amounts of RAM needed in the PCs, I doubt that Apple can fit it all using stacking. @Kostask idea of mixing stacked and non-stacked RAM sounds interesting, anyone knows whether it is technically feasible and what are the drawbacks? Will having RAM dies at different distances mess up the controller functionality?
As to memory controllers: setting them up asymmetrically like this is just asking for performance issues. What would be the benefit? Apple will most certainly use quad-channel LPDDR4 or LPDDR5 (or maybe dual-channel LPDDR5 in the lower-end Mac).
The iFixit teardown of the iPad Pro 11 shows the RAM (in that case 4GB) was on the chip in the form of two 2GB modules. The 6GB version is the same except it is two 3 GB modules. That makes me suspect the DTX likewise has the RAM on chip in the form of two 8GB modules.
It’s not on chip, it’s next to the chip. The SoC and RAM are physically separate entities.
This is an interesting overview about Apple’s packaging: https://sst.semiconductor-digest.co.../01/16/the-packaging-of-apples-a12x-is-weird/
I can see the same sort of packaging for the AS Mac SoC, but the two modules would be 8GB each. This may only be for the "entry level" SoC, as it is the most in need of price minimization and is also the highest volume SoC. Apple could also leverage their relationship with SK Hynix and Micron, and use unpackaged dies to add to their SoCs, to make the heat spreader lid more effective. I think that this is what they do with the iPhone SoCs.
This article actually shows that Apple is putting its RAM in a highly unusual place - on the same substrate as the SoC. In fact it is literally in the same logic board socket as the SoC - in essence it is horizontally stacked and gets Apple the lowest possible delay in memory to processor exchanges.
well, lowest *possible* would most likely be vertical stacking.
A very handsome guy I know wrote about that a long time ago in his ph.d dissertation (https://www.ecse.rpi.edu/frisc/theses/MaierThesis/ - see chapter 5, under “future packaging.”)
I could be misinterpreting but if you read the quoted link
The Packaging of Apple’s A12X is… Weird | Siliconica
sst.semiconductor-digest.com
it implies the DRAM packages are 16GB dies so Apple could already do 32GB "on-board" at least as far as their SoC packaging is concerned, as far back as 2018. Don't forget they've likely been working on the Mac SoCs for longer than everyone is assuming.
I'm guessing they are side by side for thinness and cooling purposes. Might not be an issue in a Mac but not necessarily worth the gains to build two different packages.
I could be misinterpreting but if you read the quoted link
The Packaging of Apple’s A12X is… Weird | Siliconica
it implies the DRAM packages are 16GB dies so Apple could already do 32GB "on-board" at least as far as their SoC packaging is concerned, as far back as 2018. Don't forget they've likely been working on the Mac SoCs for longer than everyone is assuming.
I'm guessing they are side by side for thinness and cooling purposes. Might not be an issue in a Mac but not necessarily worth the gains to build two different packages.
Apple could put in 32GB onto the SoC, but won't. It would create a second SoC, and 16GB is fine for most consumer/entry level machines, i.e. the MB/MBA and small MBP. There may be some demand for 32GB for the MB/MBA, so there may be a case for that SoC, but it very much is a low volume demand, that would probably best be met with off SoC RAM. The small MBP will start with 16GB as well, but I suspect that it will be upgradeable to >32GB GB, so Apple will have off SoC RAM, because there is no way currently to get >32GB GB onto the SoC itself. My thought is that the entry level SoC will be shared by the MB/MBA, the lower end small MBP, the regular Mac Mini, and possibly the small iMac. There will be variations within those end products: only 2 USB5/TB4 ports for the MB/MBA, with a lower clock speed and only upgradeable (as a BTO) to 32BG, with a slower clock. The regular Mini would have the same, with 4 USB5/TB4 ports. The small MBP gets 4 ports, upgradeable (BTO) to 64GB, and a higher clock. The smalll iMac could get either SoC, but would also get the 4 ports, and the 64GB option. Just my concept.
There is no reward for cramming as much as possible onto the SoC without a compelling reason. As you said above, there is no reason to build 2 SoC packages when 1 will do the job, and as I making the assumption that 16GB will be the system minimum RAM size, then 16GB on SoC is the SoC that will be built. I doubt that Apple will make 32GB the minimum RAM size.