Xeon Phi to become a socketed co-processor?

Discussion in 'Mac Pro' started by Umbongo, Nov 15, 2013.

  1. Umbongo macrumors 601

    Umbongo

    Joined:
    Sep 14, 2006
    Location:
    England
    #1
    We've talked about them a bit on here before and obviously the current Xeon Phi solutions aren't going in the new Mac Pros, but BSN are reporting rumours that the Phi will be moving to a co-processor role to tie it more to Intel's platform and mean they aren't reliant on 3rd parties for components.

    An interesting thing for those of us in the workstation/server world I think and, with Apple pushing many-core processing, still of some relevance.

    http://www.brightsideofnews.com/new...to-re-launch-as-socket-cpu2c-loses-gddr5.aspx
     
  2. wallysb01 macrumors 65816

    Joined:
    Jun 30, 2011
    #2
    That's pretty interesting. How would this work on the software side as compared to the PCI version?
     
  3. Tutor macrumors 65816

    Tutor

    Joined:
    Jun 25, 2009
    Location:
    Home of the Birmingham Civil Rights Institute
    #3
    Sometimes the giant gets to big to move itself.

    Marshalling execution to match the big idea has been Intel's biggest problem with Xeon Phi. I recall the articles spreading woe on Nvidia and AMD when Intel was releasing the PCIe version of Xeon Phi, and now thanks to your research I've learned that Intel sunk to giving away the PCIe version of Phi to sell its chipsets! Now Intel has a bright, new idea which is to stick Phi in a 2011 co-processor socket, even though Intel has not yet been able to make the Phi stand on its own legs. This tends more to provoke more pity than excitement from me and I bet that Nvidia and AMD are shaking in their boots - Not!
     
  4. deconstruct60 macrumors 604

    Joined:
    Mar 10, 2009
    #4
    Presumably the same way. Only instead of TCP/IP over PCIe it would be TCP/IP over QPI.

    I doubt this is a uniform shared memory model. Nor would pulling all the data over QPI be a good thing if still has 50+ cores to keep fed with streaming computational data.

    ----------

    With systems with just one Intel socket, there isn't much of a difference.

    If Intel puts the MIC inside the single package then perhaps.
     
  5. deconstruct60 macrumors 604

    Joined:
    Mar 10, 2009
    #5
    Not really. First, how "chipsets" is being used there doesn't seem to be putting at PCH. Seems more like the Phi and whether Intel chipeset support is on the board.

    "... First and foremost, in most of Xeon Phi deals, Intel made money on bundling it with the CPU and making money on the least expected, but a nice profit driver - the chipset itself. ..."

    Seems more like that is the CPU+Phi+PCH set of chips, chipset, rather than the C600 series PCH chipset which is substantially smaller in cost relative to both the CPU and Phi. Not going to drive big ticket profits on those since have to be bought with the CPU anyway ( there are no 3rd party PCH .... ).

    Looks like an awkward way of saying that the rest of the Phi PCIe board that Intel doesn't make or even the parts for

    "... especially given that most parts were outside Intel's jurisdiction (the company does not manufacture GDDR5 memory, nor most of PWM elements or the PCB itself).

    So the stuff that Intel doesn't make it basically sells "at cost" to get folks to buy the CPU+Phi+PCH bundle which they do make.

    AMD , Nvidia, and Apple are slapping high margin mark-ups on VRAM , PCB boards , etc. Intel isn't and is getting a rapid jumpstart into the HPC market with many dozens of design wins. The straegy makes sense. It says diddly about Phi not being competitive.


    Now? This idea was introduced out back when Phi/KnightsCorssing was being introduced as maybe eventually being an option. Some "new" desperation move.... is only a spin that is being made up.

    The article's two-step on bandwidth is also odd

    "... Naturally, GDDR5 is no longer an option and we will see a reduction in sheer bandwidth, which currently reaches 352GB/s. Going with DDR4 on a 256-bit memory bus (should the company keep LGA-2011 and LGA-2011B in foreseeable future) should cut the available bandwidth to 150GB/s range. At the same time, the size of memory should grow from 16GB to 32, 64, 128 or 256GB/s, all while improving the pure TFLOPS performance. ..."

    So cut memory bandwidth by over 50% and TFLOPs performance goes up? Perhaps for problems that didn't sit in the 5-6GB of GDDR5 but otherwise probably not or the number of cores is also scaled down to fit the shrunken bandwidth. High number of cores put high bandwidth pressure on the memory system.


    chuckle... the server division is money maker right now. So Intel isn't making more money on VRAM. Not really an issue when the systems being sold are extremely profitable.
     

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