A16 Bionic Chip in iPhone 14 Reportedly Set to Be Based on '4nm' Process [Updated]

[melgross]

This report is a bit off. It’s been expected for about two years now that Apple would be adopting TSMC’s 4nm process. This is not new information. Whether TSMC has been having some problems with 3nm is besides the point, and we know it’s been backed off by a quarter. It was never expected to debut in a product before the end of 2023. So there was no way it could be in an A16 SoC, or anything else, before then.

 

[Analog Kid]

We start talking in terms of angstroms (0.1nm).

I vote we start now and just call this their 40Å process.

It sounds way cooler and gives us all a reason to install the Swedish keyboard.

 

[amaze1499]

The A17 will be based on pure thought process. Thats literally 0 nm.

 

[ksec]

Why does MR still post clickbait DigiTimes headlines over more credible sources? May as well throw darts at a wall. The Information explicitly states TSMC will use N4P, which remains a 5nm process, for the A16. N4P only looks like a marginal improvement over N5 in the A15: https://pr.tsmc.com/english/news/2874

And The Information is wrong.

N4P wont tape out until 2H 2022. The A16 is definitely on N4 ( or stick with N5P ). All previous rumours on 4nm were baseless until TSMC actually confirms 3nm wont make it in time and has been delayed to 2023.

 

[falainber]

I believe there was not supposed to be a N4 process. It's not like after N10 came N9. That's not how it works. There is certain physics and economics behind the process steps and it was going like this: N14, N10, N7, N5, N3. The fact that they are introducing N4 probably means that N3 is in trouble. And so is Apple (in this case). Already this year M1 chips have the same single thread performance as the last year versions. Without process development progress Apple will find itself in the same situation Intel did when they encountered process development issues.

 

[AgentMcGeek]

>> While the DigiTimes report said "Apple will likely adopt TSMC's 4nm process," TSMC refers to the process as "N4P" and describes it as a "third major enhancement of TSMC's 5nm family." <<

So this is essentially saying 3nm isn't panning out and TSMC is doing a revision of 5nm (this is how things began for Intel trying to move beyond 14nm and then getting stuck there). Hopefully TSMC can overcome the issues for the iPhone 15 (late 2023).

That awfully sounds like a process shrink: just taking N5P and scaling it to 4nm. It’s common practice.

 

[name99]

I believe there was not supposed to be a N4 process. It's not like after N10 came N9. That's not how it works. There is certain physics and economics behind the process steps and it was going like this: N14, N10, N7, N5, N3. The fact that they are introducing N4 probably means that N3 is in trouble. And so is Apple (in this case). Already this year M1 chips have the same single thread performance as the last year versions. Without process development progress Apple will find itself in the same situation Intel did when they encountered process development issues.

Please don't opinionate on things you know nothing about.

(a) TSMC (and Samsung) have a well-known procedure for rolling out process *improvements* alongside new processes. The new process (eg N3) will require substantially new design effort; the process upgrade allows users of a prior process to mostly reuse their existing design effort. For example N16 (2013) was followed by an N12 upgrade (2016), the same year that N10 (new process) was rolled out. Likewise N7 (2018) was followed by N6 (2019) as well as the completely new N5 (2020).

(b) The timeline for N3 is well known. You can find the official TSMC claims on their web pages. Early customers (so of course Apple) *already* have the first round of tape outs in testing, and volume production is expected for the second half of 2022.
Apple not making N3 FOR iPHONES in 2022 does not surprise anyone and ever did -- the gap between the substantially new processes is about 27 months which, yes, is close to two years -- but different enough that anyone with a brain expects that there will be skips if Apple feels compelled to stick to their annual tempo. The only people pretending this is a big deal are idiots (plenty of them on the internet) and "journalists" and "pundits" with an agenda (plenty of them too).

(c) Since this has happened before, we have seen what Apple did! The A10 was fabbed on N16, the A10X on N10.
It would not be especially surprising if the A16 were fabbed on N4 even as the successor to the M1 (for early 2023 new iPad Pros and MBA's) is fabbed on N3. In part the volumes of those devices are much lower than iPhone, so there's less of an issue of requiring peak volume production; in part the timing of those devices is more flexible and Apple can announce/ship them any time from October 2022 to April 2023 depending on how things work out.

 

[GuilleA]

What will happen after 1 nm ?

Pico. Then Femto and later, Atto.

 

[827538]

N4 is just a refinement like N5P was to N5, it's not a node shrink, just marketing speak.

N3 seems to be on track for 2023 devices.

If people referred to them how TSMC etc refer to them there would be less confusion.

N4 is really a N5++ node.

 

[Tagbert]

Just imagine when data is transferred over the internet using quantum entanglement. Instant transfer of data to a device. Waiting for downloads will be a thing of the past.

So far, no one has shown how to actually transmit information using quantum entanglement.

 

[WestonHarvey1]

No, anything but curved edges. I cannot understand why this is a thing.

The flat edges hurt my hand. The X was the most comfortable iPhone.

 

[Tagbert]

The flat edges hurt my hand. The X was the most comfortable iPhone.

Until you dropped that slick bar of soap.

The edges on the 12/13 are not sharp, they have a substantial radius that softens the edges.

 

[WestonHarvey1]

Until you dropped that slick bar of soap.

The edges on the 12/13 are not sharp, they have a substantial radius that softens the edges.

I don't have to be bleeding to be uncomfortable.

 

[SFjohn]

Hmm, back to curves instead of flat edges, I guess?

Punch hole instead of notch?

 

[SFjohn]

What happens next? 1nm and then what?

Quantum tunneling.

 

[SFjohn]

This is the very first I've heard of 4nm !

Prior to this, the Consensus had been 3nm.

Over the past few days a number of other websites have been reporting TSMC's problems with 3nm, so Apple deciding to go with 4nm is NO real surprise.

But, I would have expected MR to have a 3nm chip with an X over it, next to the 4nm chip, for "rumor clarity," instead of sort of Hyping 4nm, which in this case, is clearly a set-back / fallback for Apple !

BTW, nothing wrong with the Enhanced 5nm process node Apple used for their A15 & latest M1 chips !

Cleary process node advancement is slowing down @ TSMC, though !

It’s slowing down everywhere. Physics is a bitch.

 

[IllinoisCorn]

It has historically referred to the transistor width*. The narrower the transistor, the more transistors you can fit in the same amount of space. You also typically see less energy leakage as the size shrinks. This miniaturization has been the single biggest driver of increased personal computing power over the last several decades.

*As others have noted, companies have shifted to referring to transistor size as a marketing tactic, so a chip labeled "5nm" may not actually be 5nm in size:

TSMC's 7nm, 5nm, and 3nm "are just numbers… it doesn't matter what the number is"

"These numbers are just numbers. They're like models in a car - it’s like BMW 5-series or Mazda 6."

www.pcgamesn.com

Thank you for this!

 

[IllinoisCorn]

Yeah, articles referencing nm process should have a disclaimer saying it's just a generation name and not referring to a physical dimension.

But you can see how that is confusing to a consumer not versed in chips. Sounds cool = good marketing, I guess.

 

[Taz Mangus]

Hate to burst everyone's bubble but there is nothing on these chips that is actually 4nm in dimensions just like the current 5-6-7nm processes that every chip manufacturer is making. It's all a historical node naming convention.

It is specifying the distance between transistors. Or do I have that wrong?

 

[WestonHarvey1]

“nm” is just a marketing ploy, it doesn’t really denote size.

Your comment is the same as saying: “it’s remarkable how Apple traveled into the future and brought back the iPhone X, skipping the iPhone 9. Freaking remarkable”

It’s interesting to see how many people fall for this, I don’t know why automakers don’t just start releasing 2024 model year vehicles this winter! ?

People fall for it because it's so brazenly dishonest. I mean, why call it a nanometer if it isn't measuring anything? It used to, and everyone knows things keep getting smaller, so no one expects they're suddenly being lied to. Not even the media, who report on quantum tunneling effects and the end of Moore's law with each new process node.

 

[Rafagon]

Hate to burst everyone's bubble but there is nothing on these chips that is actually 4nm in dimensions just like the current 5-6-7nm processes that every chip manufacturer is making. It's all a historical node naming convention.

What Do "7nm" and "10nm" Mean for CPUs, and Why Do They Matter?

CPUs are made using billions of tiny transistors, electrical gates that switch on and off to perform calculations.

www.howtogeek.com

It actually does mean something.

 

[Rafagon]

It is specifying the distance between transistors. Or do I have that wrong?

What Do "7nm" and "10nm" Mean for CPUs, and Why Do They Matter?

CPUs are made using billions of tiny transistors, electrical gates that switch on and off to perform calculations.

www.howtogeek.com

 

[Jakewilk]

I still don’t understand what is 5 mm. The chip? The tools that made the chip?

5 nm refers to the ‘technology node’ which is a convention determined by a consortium (IRDS) to unify chip technology development and research. It used to refer to the physical gate length of the transistors in the processor, but that reached a practical limit around 22 nm and has not shrunk appreciably since. Each node steps down in size by ~30% (14nm -> 10 nm -> 7nm etc.) and corresponds roughly to a theoretical doubling of transistor density. However, since that number is no longer tied to a physical dimension, it doesn’t work that way in practice any more.

Nowadays the technology node serves solely as a way to communicate that a chip is manufactured using a more advanced process than the previous generation. Denser? Yes, but by how much is purely a matter of who is manufacturing the chip.

 

[Mr.Brossard]

What happens next? 1nm and then what?

Angstroms (Å)

 

[AppleFan1998]

We start talking in terms of angstroms (0.1nm). But the physical challenges increase exponentially as process size decreases.

maybe picometer chips or move on to graphene or carbon nanotubes.