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MP All Models AMD Radeon RX 6800 XT / 6900 XT for macOS?

startergo said:
Are you sure you actually patched the vbios? I don't see a difference between both attached. Also don't forget before patching for GOP you need to patch for booting with cMP with syncretic's patch first.
Click to expand...
Wow... i never mind they are the same because i use the FixRX6x00ROM.exe to change it.
I double check all now and tell you what happen
Anyway, thank you so much for your help

Edit : i found some difference between the two files here : start end of differences
but i don't patch for GOP because i was afraid to made a mistake...
I try now
Capture d’écran 2023-04-20 à 09.50.55.png
Capture d’écran 2023-04-20 à 09.51.14.png
 
Last edited:
@startergo

Can you please explain the procedure to update my rom to GOP ?
I put the card in the PC actually but i don't really understand what i need to do with GOPupd.py
i just installed Phyton on the PC.
Best regards
 
olixsm said:
@startergo

Can you please explain the procedure to update my rom to GOP ?
I put the card in the PC actually but i don't really understand what i need to do with GOPupd.py
i just installed Phyton on the PC.
Best regards
Click to expand...
Sorry I thought you were doing the GOP patch, but instead you were only doing the Syncretic patch. Anyway the procedure for the 6900XT is here:
 
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startergo said:
Sorry I thought you were doing the GOP patch, but instead you were only doing the Syncretic patch. Anyway the procedure for the 6900XT is here:
Click to expand...
OMG :eek:, now i feel i'm really stupid... because i'm completely lost when i read the procedure :(
I need to take my syncretic patched rom and do something inside with hexfiend but i don't understand really what.

I can send you something on paypal for the time you help me :)
 
Last edited:
olixsm said:
OMG :eek:, now i feel i'm really stupid... because i'm completely lost when i read the procedure :(
I need to take my syncretic patched rom and do something inside with hexfiend but i don't understant really what.
Click to expand...
This is only if you want to patch the card for boot screen. Not needed for regular boot. Just the syncretic’s fixrom should be enough for you.
 
startergo said:
Are you sure you actually patched the vbios? I don't see a difference between both attached.
Click to expand...
Hmm, just compared the two files with HexFiend and found them far from beeing identical...
startergo said:
Also don't forget before patching for GOP you need to patch for booting with cMP with syncretic's patch first.
Click to expand...
...but you are perfectly right: Syncretic's has to be applied before injecting the GOP-enabler! After, it just does not work anymore. Most likely cause some of the rom's parts/offsets are not where they are expected anymore.
 
@startergo
@tsialex

So the Syncretic's patch was correctly applied but my problem is the graphic card is not well recognized in my 5.1 and everything is very slow + no acceleration available in Videoproc...
It's like the driver not recognzed the card.
Any idea ?
Thank you
 
olixsm said:
@startergo
@tsialex

So the Syncretic's patch was correctly applied but my problem is the graphic card is not well recognized in my 5.1 and everything is very slow + no acceleration available in Videoproc...
It's like the driver not recognzed the card.
Any idea ?
Thank you
Click to expand...
Send me a copy of the IOTegistry IORegistry backup with the card installed.
 
Last edited:
olixsm said:
Installed in the Mac or in the PC ?
How can i find the IOTegistery ?
Sorry, i'm newbie :rolleyes:
Click to expand...
Sorry misspelled it. IO Registry explorer can be downloaded from the free Apple developer account. Once you log in look for:
1682080859549.png
 
Last edited:
startergo said:
Yes the driver is not attached. Try this SSDT.
Click to expand...
I add the SSDT in ACPI folder in EFI and add this in config.plist :
but after rebooting it's always very slow and no acceleration

<key>ACPI</key>
<dict>
<key>Add</key>
<array>
<dict>
<key>Comment</key>
<string>Thunderbolt 3</string>
<key>Enabled</key>
<false/>
<key>Path</key>
<string>SSDT-TBOLT3.aml</string>
</dict>
<dict> from here
<key>Comment</key>
<string>RX6900XT</string>
<key>Enabled</key>
<false/>
<key>Path</key>
<string>6900XT.aml</string>
</dict> to here
</array>
<key>Delete</key>
<array/>
<key>Patch</key>
<array/>
<key>Quirks</key>
<dict>
<key>FadtEnableReset</key>
<false/>
<key>NormalizeHeaders</key>
<false/>
<key>RebaseRegions</key>
<false/>
<key>ResetHwSig</key>
<false/>
<key>ResetLogoStatus</key>
<false/>
<key>SyncTableIds</key>
<false/>
</dict>
 
Last edited:
olixsm said:
I just put SSDT in ACPI folder in EFI partition ?
or there is something to modify in config.plist ?
Click to expand...
Yes. You need to point to it in the config file. Take a look at the main cMP opencore thread and look for the thunderbolt SSDT example in the first post. After booting if it does not work attach the IORegistry again to see if the SSDT is applied.
 
gfxutil results


ox@MPNE293OX ~ % /Users/ox/Desktop/gfxutil -f display
07:00.0 1002:73af /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/display@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)


/Users/ox/Desktop/gfxutil ; exit;
ox@MPNE293OX ~ % /Users/ox/Desktop/gfxutil ; exit;
00:00.0 8086:3406 /PCI0@0/ESI@0 = PciRoot(0x0)/Pci(0x0,0x0)
00:01.0 8086:3408 /PCI0@0/IOU2@1 = PciRoot(0x0)/Pci(0x1,0x0)
00:03.0 8086:340a /PCI0@0/IOU0@3 = PciRoot(0x0)/Pci(0x3,0x0)
00:07.0 8086:340e /PCI0@0/IOU1@7 = PciRoot(0x0)/Pci(0x7,0x0)
00:0d.0 8086:343a /PCI0@0/pci8086,343a@D = PciRoot(0x0)/Pci(0xD,0x0)
00:0d.1 8086:343b /PCI0@0/pci8086,343b@D,1 = PciRoot(0x0)/Pci(0xD,0x1)
00:0d.2 8086:343c /PCI0@0/pci8086,343c@D,2 = PciRoot(0x0)/Pci(0xD,0x2)
00:0d.3 8086:343d /PCI0@0/pci8086,343d@D,3 = PciRoot(0x0)/Pci(0xD,0x3)
00:0d.4 8086:3418 /PCI0@0/pci8086,3418@D,4 = PciRoot(0x0)/Pci(0xD,0x4)
00:0d.5 8086:3419 /PCI0@0/pci8086,3419@D,5 = PciRoot(0x0)/Pci(0xD,0x5)
00:0d.6 8086:341a /PCI0@0/pci8086,341a@D,6 = PciRoot(0x0)/Pci(0xD,0x6)
00:0d.7 8086:341b /PCI0@0/pci8086,341b@D,7 = PciRoot(0x0)/Pci(0xD,0x7)
00:0e.0 8086:341c /PCI0@0/pci8086,341c@E = PciRoot(0x0)/Pci(0xE,0x0)
00:0e.1 8086:341d /PCI0@0/pci8086,341d@E,1 = PciRoot(0x0)/Pci(0xE,0x1)
00:0e.2 8086:341e /PCI0@0/pci8086,341e@E,2 = PciRoot(0x0)/Pci(0xE,0x2)
00:0e.3 8086:341f /PCI0@0/pci8086,341f@E,3 = PciRoot(0x0)/Pci(0xE,0x3)
00:0e.4 8086:3439 /PCI0@0/pci8086,3439@E,4 = PciRoot(0x0)/Pci(0xE,0x4)
00:0f.0 8086:3424 /PCI0@0/pci8086,3424@F = PciRoot(0x0)/Pci(0xF,0x0)
00:10.0 8086:3425 /PCI0@0/pci8086,3425@10 = PciRoot(0x0)/Pci(0x10,0x0)
00:10.1 8086:3426 /PCI0@0/pci8086,3426@10,1 = PciRoot(0x0)/Pci(0x10,0x1)
00:11.0 8086:3427 /PCI0@0/pci8086,3427@11 = PciRoot(0x0)/Pci(0x11,0x0)
00:11.1 8086:3428 /PCI0@0/pci8086,3428@11,1 = PciRoot(0x0)/Pci(0x11,0x1)
00:13.0 8086:342d /PCI0@0/pci8086,342d@13 = PciRoot(0x0)/Pci(0x13,0x0)
00:14.0 8086:342e /PCI0@0/pci8086,342e@14 = PciRoot(0x0)/Pci(0x14,0x0)
00:14.1 8086:3422 /PCI0@0/pci8086,3422@14,1 = PciRoot(0x0)/Pci(0x14,0x1)
00:14.2 8086:3423 /PCI0@0/pci8086,3423@14,2 = PciRoot(0x0)/Pci(0x14,0x2)
00:14.3 8086:3438 /PCI0@0/pci8086,3438@14,3 = PciRoot(0x0)/Pci(0x14,0x3)
00:15.0 8086:342f /PCI0@0/pci8086,342f@15 = PciRoot(0x0)/Pci(0x15,0x0)
00:16.0 8086:3430 /PCI0@0/pci8086,3430@16 = PciRoot(0x0)/Pci(0x16,0x0)
00:16.1 8086:3431 /PCI0@0/pci8086,3431@16,1 = PciRoot(0x0)/Pci(0x16,0x1)
00:16.2 8086:3432 /PCI0@0/pci8086,3432@16,2 = PciRoot(0x0)/Pci(0x16,0x2)
00:16.3 8086:3433 /PCI0@0/pci8086,3433@16,3 = PciRoot(0x0)/Pci(0x16,0x3)
00:16.4 8086:3429 /PCI0@0/pci8086,3429@16,4 = PciRoot(0x0)/Pci(0x16,0x4)
00:16.5 8086:342a /PCI0@0/pci8086,342a@16,5 = PciRoot(0x0)/Pci(0x16,0x5)
00:16.6 8086:342b /PCI0@0/pci8086,342b@16,6 = PciRoot(0x0)/Pci(0x16,0x6)
00:16.7 8086:342c /PCI0@0/pci8086,342c@16,7 = PciRoot(0x0)/Pci(0x16,0x7)
00:1a.0 8086:3a37 /PCI0@0/UHC4@1A = PciRoot(0x0)/Pci(0x1A,0x0)
00:1a.1 8086:3a38 /PCI0@0/UHC5@1A,1 = PciRoot(0x0)/Pci(0x1A,0x1)
00:1a.2 8086:3a39 /PCI0@0/UHC6@1A,2 = PciRoot(0x0)/Pci(0x1A,0x2)
00:1a.7 8086:3a3c /PCI0@0/EHC2@1A,7 = PciRoot(0x0)/Pci(0x1A,0x7)
00:1b.0 8086:3a3e /PCI0@0/HDEF@1B = PciRoot(0x0)/Pci(0x1B,0x0)
00:1c.0 8086:3a40 /PCI0@0/pci-bridge@1C = PciRoot(0x0)/Pci(0x1C,0x0)
00:1c.1 8086:3a42 /PCI0@0/pci-bridge@1C,1 = PciRoot(0x0)/Pci(0x1C,0x1)
00:1c.2 8086:3a44 /PCI0@0/RP03@1C,2 = PciRoot(0x0)/Pci(0x1C,0x2)
00:1c.3 8086:3a46 /PCI0@0/RP04@1C,3 = PciRoot(0x0)/Pci(0x1C,0x3)
00:1c.4 8086:3a48 /PCI0@0/RP05@1C,4 = PciRoot(0x0)/Pci(0x1C,0x4)
00:1c.5 8086:3a4a /PCI0@0/RP06@1C,5 = PciRoot(0x0)/Pci(0x1C,0x5)
00:1d.0 8086:3a34 /PCI0@0/UHC1@1D = PciRoot(0x0)/Pci(0x1D,0x0)
00:1d.1 8086:3a35 /PCI0@0/UHC2@1D,1 = PciRoot(0x0)/Pci(0x1D,0x1)
00:1d.2 8086:3a36 /PCI0@0/UHC3@1D,2 = PciRoot(0x0)/Pci(0x1D,0x2)
00:1d.7 8086:3a3a /PCI0@0/EHC1@1D,7 = PciRoot(0x0)/Pci(0x1D,0x7)
00:1e.0 8086:244e /PCI0@0/pci-bridge@1E = PciRoot(0x0)/Pci(0x1E,0x0)
00:1f.0 8086:3a18 /PCI0@0/LPCB@1F = PciRoot(0x0)/Pci(0x1F,0x0)
00:1f.2 8086:3a22 /PCI0@0/SATA@1F,2 = PciRoot(0x0)/Pci(0x1F,0x2)
00:1f.3 8086:3a30 /PCI0@0/SBUS@1F,3 = PciRoot(0x0)/Pci(0x1F,0x3)
01:00.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)
05:00.0 1002:1478 /PCI0@0/IOU0@3/PXS1@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)
0c:00.0 8086:10f6 /PCI0@0/RP04@1C,3/ETH1@0 = PciRoot(0x0)/Pci(0x1C,0x3)/Pci(0x0,0x0)
0f:00.0 14e4:432b /PCI0@0/RP06@1C,5/ARPT@0 = PciRoot(0x0)/Pci(0x1C,0x5)/Pci(0x0,0x0)
0d:00.0 104c:823e /PCI0@0/RP05@1C,4/FWBR@0 = PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)
02:02.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0/PPB2@2 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x2,0x0)
02:04.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0/PPB4@4 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x4,0x0)
08:00.0 144d:a808 /PCI0@0/IOU1@7/PXS2@0 = PciRoot(0x0)/Pci(0x7,0x0)/Pci(0x0,0x0)
06:00.0 1002:1479 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
0b:00.0 8086:10f6 /PCI0@0/RP03@1C,2/ETH0@0 = PciRoot(0x0)/Pci(0x1C,0x2)/Pci(0x0,0x0)
0e:00.0 104c:823f /PCI0@0/RP05@1C,4/FWBR@0/FRWR@0 = PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x0,0x0)
07:00.0 1002:73af /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/display@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
07:00.1 1002:ab28 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/HDAU@0,1 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x1)
07:00.2 1002:73a6 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/pci1002,73a6@0,2 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x2)
07:00.3 1002:73a4 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/pci1002,73a4@0,3 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x3)
 
olixsm said:
gfxutil results


ox@MPNE293OX ~ % /Users/ox/Desktop/gfxutil -f display
07:00.0 1002:73af /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/display@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)


/Users/ox/Desktop/gfxutil ; exit;
ox@MPNE293OX ~ % /Users/ox/Desktop/gfxutil ; exit;
00:00.0 8086:3406 /PCI0@0/ESI@0 = PciRoot(0x0)/Pci(0x0,0x0)
00:01.0 8086:3408 /PCI0@0/IOU2@1 = PciRoot(0x0)/Pci(0x1,0x0)
00:03.0 8086:340a /PCI0@0/IOU0@3 = PciRoot(0x0)/Pci(0x3,0x0)
00:07.0 8086:340e /PCI0@0/IOU1@7 = PciRoot(0x0)/Pci(0x7,0x0)
00:0d.0 8086:343a /PCI0@0/pci8086,343a@D = PciRoot(0x0)/Pci(0xD,0x0)
00:0d.1 8086:343b /PCI0@0/pci8086,343b@D,1 = PciRoot(0x0)/Pci(0xD,0x1)
00:0d.2 8086:343c /PCI0@0/pci8086,343c@D,2 = PciRoot(0x0)/Pci(0xD,0x2)
00:0d.3 8086:343d /PCI0@0/pci8086,343d@D,3 = PciRoot(0x0)/Pci(0xD,0x3)
00:0d.4 8086:3418 /PCI0@0/pci8086,3418@D,4 = PciRoot(0x0)/Pci(0xD,0x4)
00:0d.5 8086:3419 /PCI0@0/pci8086,3419@D,5 = PciRoot(0x0)/Pci(0xD,0x5)
00:0d.6 8086:341a /PCI0@0/pci8086,341a@D,6 = PciRoot(0x0)/Pci(0xD,0x6)
00:0d.7 8086:341b /PCI0@0/pci8086,341b@D,7 = PciRoot(0x0)/Pci(0xD,0x7)
00:0e.0 8086:341c /PCI0@0/pci8086,341c@E = PciRoot(0x0)/Pci(0xE,0x0)
00:0e.1 8086:341d /PCI0@0/pci8086,341d@E,1 = PciRoot(0x0)/Pci(0xE,0x1)
00:0e.2 8086:341e /PCI0@0/pci8086,341e@E,2 = PciRoot(0x0)/Pci(0xE,0x2)
00:0e.3 8086:341f /PCI0@0/pci8086,341f@E,3 = PciRoot(0x0)/Pci(0xE,0x3)
00:0e.4 8086:3439 /PCI0@0/pci8086,3439@E,4 = PciRoot(0x0)/Pci(0xE,0x4)
00:0f.0 8086:3424 /PCI0@0/pci8086,3424@F = PciRoot(0x0)/Pci(0xF,0x0)
00:10.0 8086:3425 /PCI0@0/pci8086,3425@10 = PciRoot(0x0)/Pci(0x10,0x0)
00:10.1 8086:3426 /PCI0@0/pci8086,3426@10,1 = PciRoot(0x0)/Pci(0x10,0x1)
00:11.0 8086:3427 /PCI0@0/pci8086,3427@11 = PciRoot(0x0)/Pci(0x11,0x0)
00:11.1 8086:3428 /PCI0@0/pci8086,3428@11,1 = PciRoot(0x0)/Pci(0x11,0x1)
00:13.0 8086:342d /PCI0@0/pci8086,342d@13 = PciRoot(0x0)/Pci(0x13,0x0)
00:14.0 8086:342e /PCI0@0/pci8086,342e@14 = PciRoot(0x0)/Pci(0x14,0x0)
00:14.1 8086:3422 /PCI0@0/pci8086,3422@14,1 = PciRoot(0x0)/Pci(0x14,0x1)
00:14.2 8086:3423 /PCI0@0/pci8086,3423@14,2 = PciRoot(0x0)/Pci(0x14,0x2)
00:14.3 8086:3438 /PCI0@0/pci8086,3438@14,3 = PciRoot(0x0)/Pci(0x14,0x3)
00:15.0 8086:342f /PCI0@0/pci8086,342f@15 = PciRoot(0x0)/Pci(0x15,0x0)
00:16.0 8086:3430 /PCI0@0/pci8086,3430@16 = PciRoot(0x0)/Pci(0x16,0x0)
00:16.1 8086:3431 /PCI0@0/pci8086,3431@16,1 = PciRoot(0x0)/Pci(0x16,0x1)
00:16.2 8086:3432 /PCI0@0/pci8086,3432@16,2 = PciRoot(0x0)/Pci(0x16,0x2)
00:16.3 8086:3433 /PCI0@0/pci8086,3433@16,3 = PciRoot(0x0)/Pci(0x16,0x3)
00:16.4 8086:3429 /PCI0@0/pci8086,3429@16,4 = PciRoot(0x0)/Pci(0x16,0x4)
00:16.5 8086:342a /PCI0@0/pci8086,342a@16,5 = PciRoot(0x0)/Pci(0x16,0x5)
00:16.6 8086:342b /PCI0@0/pci8086,342b@16,6 = PciRoot(0x0)/Pci(0x16,0x6)
00:16.7 8086:342c /PCI0@0/pci8086,342c@16,7 = PciRoot(0x0)/Pci(0x16,0x7)
00:1a.0 8086:3a37 /PCI0@0/UHC4@1A = PciRoot(0x0)/Pci(0x1A,0x0)
00:1a.1 8086:3a38 /PCI0@0/UHC5@1A,1 = PciRoot(0x0)/Pci(0x1A,0x1)
00:1a.2 8086:3a39 /PCI0@0/UHC6@1A,2 = PciRoot(0x0)/Pci(0x1A,0x2)
00:1a.7 8086:3a3c /PCI0@0/EHC2@1A,7 = PciRoot(0x0)/Pci(0x1A,0x7)
00:1b.0 8086:3a3e /PCI0@0/HDEF@1B = PciRoot(0x0)/Pci(0x1B,0x0)
00:1c.0 8086:3a40 /PCI0@0/pci-bridge@1C = PciRoot(0x0)/Pci(0x1C,0x0)
00:1c.1 8086:3a42 /PCI0@0/pci-bridge@1C,1 = PciRoot(0x0)/Pci(0x1C,0x1)
00:1c.2 8086:3a44 /PCI0@0/RP03@1C,2 = PciRoot(0x0)/Pci(0x1C,0x2)
00:1c.3 8086:3a46 /PCI0@0/RP04@1C,3 = PciRoot(0x0)/Pci(0x1C,0x3)
00:1c.4 8086:3a48 /PCI0@0/RP05@1C,4 = PciRoot(0x0)/Pci(0x1C,0x4)
00:1c.5 8086:3a4a /PCI0@0/RP06@1C,5 = PciRoot(0x0)/Pci(0x1C,0x5)
00:1d.0 8086:3a34 /PCI0@0/UHC1@1D = PciRoot(0x0)/Pci(0x1D,0x0)
00:1d.1 8086:3a35 /PCI0@0/UHC2@1D,1 = PciRoot(0x0)/Pci(0x1D,0x1)
00:1d.2 8086:3a36 /PCI0@0/UHC3@1D,2 = PciRoot(0x0)/Pci(0x1D,0x2)
00:1d.7 8086:3a3a /PCI0@0/EHC1@1D,7 = PciRoot(0x0)/Pci(0x1D,0x7)
00:1e.0 8086:244e /PCI0@0/pci-bridge@1E = PciRoot(0x0)/Pci(0x1E,0x0)
00:1f.0 8086:3a18 /PCI0@0/LPCB@1F = PciRoot(0x0)/Pci(0x1F,0x0)
00:1f.2 8086:3a22 /PCI0@0/SATA@1F,2 = PciRoot(0x0)/Pci(0x1F,0x2)
00:1f.3 8086:3a30 /PCI0@0/SBUS@1F,3 = PciRoot(0x0)/Pci(0x1F,0x3)
01:00.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)
05:00.0 1002:1478 /PCI0@0/IOU0@3/PXS1@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)
0c:00.0 8086:10f6 /PCI0@0/RP04@1C,3/ETH1@0 = PciRoot(0x0)/Pci(0x1C,0x3)/Pci(0x0,0x0)
0f:00.0 14e4:432b /PCI0@0/RP06@1C,5/ARPT@0 = PciRoot(0x0)/Pci(0x1C,0x5)/Pci(0x0,0x0)
0d:00.0 104c:823e /PCI0@0/RP05@1C,4/FWBR@0 = PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)
02:02.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0/PPB2@2 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x2,0x0)
02:04.0 111d:8061 /PCI0@0/IOU2@1/I2PS@0/PPB4@4 = PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x4,0x0)
08:00.0 144d:a808 /PCI0@0/IOU1@7/PXS2@0 = PciRoot(0x0)/Pci(0x7,0x0)/Pci(0x0,0x0)
06:00.0 1002:1479 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
0b:00.0 8086:10f6 /PCI0@0/RP03@1C,2/ETH0@0 = PciRoot(0x0)/Pci(0x1C,0x2)/Pci(0x0,0x0)
0e:00.0 104c:823f /PCI0@0/RP05@1C,4/FWBR@0/FRWR@0 = PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x0,0x0)
07:00.0 1002:73af /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/display@0 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
07:00.1 1002:ab28 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/HDAU@0,1 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x1)
07:00.2 1002:73a6 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/pci1002,73a6@0,2 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x2)
07:00.3 1002:73a4 /PCI0@0/IOU0@3/PXS1@0/pci-bridge@0/pci1002,73a4@0,3 = PciRoot(0x0)/Pci(0x3,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x3)
Click to expand...
Have you tested the SSDT?
 
startergo said:
Have you tested the SSDT?
Click to expand...
olixsm said:
I add the SSDT in ACPI folder in EFI and add this in config.plist :
but after rebooting it's always very slow and no acceleration

<key>ACPI</key>
<dict>
<key>Add</key>
<array>
<dict>
<key>Comment</key>
<string>Thunderbolt 3</string>
<key>Enabled</key>
<false/>
<key>Path</key>
<string>SSDT-TBOLT3.aml</string>
</dict>
<dict> from here
<key>Comment</key>
<string>RX6900XT</string>
<key>Enabled</key>
<false/>
<key>Path</key>
<string>6900XT.aml</string>
</dict> to here
</array>
<key>Delete</key>
<array/>
<key>Patch</key>
<array/>
<key>Quirks</key>
<dict>
<key>FadtEnableReset</key>
<false/>
<key>NormalizeHeaders</key>
<false/>
<key>RebaseRegions</key>
<false/>
<key>ResetHwSig</key>
<false/>
<key>ResetLogoStatus</key>
<false/>
<key>SyncTableIds</key>
<false/>
</dict>
Click to expand...
 
startergo said:
Yes. You need to point to it in the config file. Take a look at the main cMP opencore thread and look for the thunderbolt SSDT example in the first post. After booting if it does not work attach the IORegistry again to see if the SSDT is applied.
Click to expand...
ok, i do it now
 
olixsm said:
<key>Enabled</key>
<false/>
Click to expand...
you need to change that to true
<dict>
<key>Comment</key>
<string>6900XT</string>
<key>Enabled</key>
<true/>
<key>Path</key>
<string>6900XT.aml</string>
</dict>
Click to expand...
If this doesn't work change:
Code: 
"device-id",
Buffer (0x04)
{
   0xAE, 0x73, 0x00, 0x00                          
}

to:
Code: 
"device-id",
Buffer (0x04)
{
   0xBF, 0x73, 0x00, 0x00                          
}
in the SSDT.
Use maciASL for editing the SSDT.

Navi 21 series​

#Highest Supported OS: Current/Ventura (13)​

#Initial Supported OS: Big Sur (11.4)​

As of 11.4, Apple has added Navi 21 support.

Supported Cards:

  • RX 6800
  • RX 6800 XT
  • RX 6900 XT
    • The XTXH variant (Device ID: 0x73AF) is supported with WhateverGreen 1.5.2 and spoofing device-id to 0x73BF.
Note: Most Navi 21 cards currently require the boot argument agdpmod=pikera to get a display out.
Click to expand...
 
Last edited:
startergo said:
you need to change that to true

If this doesn't work change:
Code: 
"device-id",
Buffer (0x04)
{
   0xAE, 0x73, 0x00, 0x00                        
}

to:
Code: 
"device-id",
Buffer (0x04)
{
   0xBF, 0x73, 0x00, 0x00                        
}
in the SSDT.
Use maciASL for editing the SSDT.
Click to expand...
I do everything you tell, step by step
Changing false to true don't give result
Changing 0xAE by 0xBF make loop booting
I made reset SMC and Zap NVRAM but remain the same, loop booting

Attach, IO Registry after booting with config.list changed from false to true
 

Attachments

  • MPNE293OX_v3.zip
    7.3 MB · Views: 84
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