Yeah, you're right. But I suppose it effectively gets "transformed" along the way, if you think about the whole path from CPU to display. PCIe lanes run from the CPU to the GPU, where they effectively "dead end", and then displayport exits the GPU and then is presumably multiplexed with raw PCIe lanes into "Thunderbolt."
I might be digging myself in deeper, but somehow I doubt it would multiplex raw PCIe3 lanes with displayport since I believe TB carries PCIe2 signals multiplexed with displayport. It might be something like:
CPU
|
| PCIe3 x8 or x16
|
v
Graphics card entry
| . . . . . . . . . |
| . . . . . . . . . |
v . . . . . . . . . v
GPU . . . . . PCIe3 to PCIe2 bridge
| . . . . . . . . . |
| . . . . . . . . . |
v . . . . . . . . . v
Thunderbolt bridge
|
| end of graphics card. T-Bolt out
|
v
Edit: please excuse the dots. Only put them in to keep the spacing/formatting.
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