That was done in softwareSomeone in this thread mentioned earlier that the strategy of DEC Alpha64 was the most excellent and it could emulate 3 different instruction sets simultaneously all within the same processor.
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Was referring to the code morphingthat's vliw, not risc
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I have. I remember them fairly well. They had a pretty good mobile processor for their day.
But I am not talking about code morphing. ARM and Intel both use μop translation, and ARMv8 has more registers than x86-64, so it seems like building a real-time hybrid might be a realistic possibility. There was rumor of a Taiwanese company that had a hybrid (32-bit ARM/64-bit Intel) a few years back, so it probably can be done effectively.
Ever hear of exponential? Ever wonder why there was a Texas team?
I wouldn’t call it translation, though. In x86 designs what is going on with the microcode rom is mostly dealing with situations where the instruction lengths are greater than the minimum. You still have to deal with all the crazy addressing modes and such. Microcode is mainly a way to trap all the complexity in the instruction decoder and not have to run lots of wires everywhere. Attempts by others to build x86 around a real risc core haven’t gone swimmingly. I was there.