Apple Reportedly Worked on Two 'Extreme' Chips

[deconstruct60]

Nobody said it was "necessary", but it is a perfectly reasonable guess that it was Apple's hope/plan to use the same Jade dies for 2C and 4C. Maybe in a couple decades we'll find out how close the M* Quadra got to being released.

That 'hope/plan' is primarily to save Apple money, not to solve the customer problem/workloads. Which is likely why it failed at Perf/$.

It wasn't that it couldn't be technically built. The problem was relatively few would be willing to buy one. it isn't doing what Apple Silicon to the rest of the Mac products in the line up where Pref/$ is substantially increasing.

Similar to the $999 XDR stand... it 'worked' in the market until it didn't. The Extreme probably didn't even get some rabid Apple targeted buyers to buy into it.

 

[Boil]

What... What about the Jade-8C...?!? ;^p

 

[NT1440]

That 'hope/plan' is primarily to save Apple money, not to solve the customer problem/workloads. Which is likely why it failed at Perf/$.

It wasn't that it couldn't be technically built. The problem was relatively few would be willing to buy one. it isn't doing what Apple Silicon to the rest of the Mac products in the line up where Pref/$ is substantially increasing.

Similar to the $999 XDR stand... it 'worked' in the market until it didn't. The Extreme probably didn't even get some rabid Apple targeted buyers to buy into it.

It probably would have been an absolute monster for the time, but as a monolithic chip even Apple wouldn’t be able to justify the losses on manufacturing such a behemoth per wafer…

 

[deconstruct60]

It probably would have been an absolute monster for the time, but as a monolithic chip even Apple wouldn’t be able to justify the losses on manufacturing such a behemoth per wafer…

4x a "max" die couldn't have been a monolithic chip. The M1 Max by itself was already in the 1/2 reticle range. Even a 2x bigger die was going to run into reticle limits. ( Ultra's TSMC-InFO packaging has been rectile limited which presented limits on Max size previously ). Let alone doubling that again.

As have gone from TSMC N7 , N3 , N2 doubling the cores in the same space has gotten more practicle.

Nvidia was doing recticle size dies. But they were not anywhere near affordable to buy, but there was enough customers that is clearly worked for them. However, there were absolutely not selling those chips into one product from one single vendor for a smallish subset of that target market.

Cerabras is selling whole wafer SoCs and making money. But very different price point from a Mac Pro.

 

[deconstruct60]

What... What about the Jade-8C...?!? ;^p

Past 2 chips probably going to need one (or more ) active 'glue' chips to cobble it together. So really probably going to be an 'odd number'-C .

 

[Unregistered 4U]

The entire point of what I was saying is that it's a valuable niche market. Saying “Apple shouldn't make supercars because most people by phones” is like saying Porsche shouldn’t make souped up 911s because most of their customers buy Cayennes.

Ok, I was making the point that anything “super high end computer” is not a valuable niche market. Or, probably more correctly, not valuable enough (considering the size of the Mac business vs “everything else Apple does”) Apple has successfully grown their business far beyond the Mac and even far beyond just Apple users. For many products in their lineup, they’ve said roughly half are being purchased by folks new to Apple.

 

[DavidSchaub]

That 'hope/plan' is primarily to save Apple money, not to solve the customer problem/workloads. Which is likely why it failed at Perf/$.

Well, Apple going full on heterogenous Chiplet changes the rules on scaling, so... time will tell.

 

[NT1440]

4x a "max" die couldn't have been a monolithic chip. The M1 Max by itself was already in the 1/2 reticle range. Even a 2x bigger die was going to run into reticle limits. ( Ultra's TSMC-InFO packaging has been rectile limited which presented limits on Max size previously ). Let alone doubling that again.

As have gone from TSMC N7 , N3 , N2 doubling the cores in the same space has gotten more practicle.

Nvidia was doing recticle size dies. But they were not anywhere near affordable to buy, but there was enough customers that is clearly worked for them. However, there were absolutely not selling those chips into one product from one single vendor for a smallish subset of that target market.

Cerabras is selling whole wafer SoCs and making money. But very different price point from a Mac Pro.

I thought the original rumblings about the “ultra” was that it wasn’t just stitching two maxes together, that it was supposed to be a totally different chip?

Granted, obviously it’s been years since that talk, and it sounds like you know more than I about wafer size and production. Guess I was just mistaken

 

[deconstruct60]

Well, Apple going full on heterogenous Chiplet changes the rules on scaling, so... time will tell.

Time has told. The M1-M4 aren't hetergenous in the slightest. So it could not have been Apple plan for heterogenous solution for "Extreme". It was pound chunky homogenous "round" chip into "square" hole.
Was Apple eventually going to be shifting to hetergenous chiplets . The technology roadmap ( smaller reticle for High-NA , higher fab prices. etc. ) all pointed to them having to be adopted eventually whether they wanted to or not at some point in the future. At some point Apple was going to have to do more deliberate, good chiplet design.

However, going Hetergenous don't particularly map to an "Extreme" either. If Apple functionally decomposed the memory controller and large cache (and perhaps some I/O into a 'bottom layer' and glued a 'cores denser' chiplet on top that would probably do more to pull more workloads into the Pro/Max/Ultra space and lower the need for an Extreme chip. The future into the future get the more "horsepower" can probably pack into a smaller space (part of whole reason why fab stuff is on the ever higher cost tract now. )

The M5 Ultra might be first step at hetero.

p-m-r	CPU+I/O chiplet	p-m-r
Big GPU + memory controller chiplet	Glue Routing (optional serverI/O ) chiplet	Big GPU + memory controller chiplet
p-m-r	CPU+I/O chiplet	p-m-r

Because the "Max" has been chopped in two have to get to four to get to a 'double Max' Ultra. Probably don't need a N3 deluxe chip for the "Glue routing" chiplet. Possible Memory Retiming ( p-m-r ) if CPU+I/O chiplet hieght (up/down in table) pushes memory modules far enough away to be an issue. The memory isn't on the main package so p-m-r isn't a hetero-chiplet issue. However, the farther away push the chiplets from one one another the more scaling issues going to run into.

This has some potential problems "Extreme" probably ran into, but the CPU chiplets don't entangle themsles into the memory package placement problem.

Stacking stuff vertically works up until it doesn't.

Heterogenous isn't going to completely solve scaling solely in and of itself.

 

[DavidSchaub]

Heterogenous isn't going to completely solve scaling solely in and of itself.

Exactly, but it can help.

 

[deconstruct60]

I thought the original rumblings about the “ultra” was that it wasn’t just stitching two maxes together, that it was supposed to be a totally different chip?

Rumblings from inside of Apple or rumblings from folks looking to compose something more Mac Pro centered in design (starting from Xeon W / Threadripper and dGPUs starting point)?

There was also some rumblings when Apple released the initial 'photo' of the M1 Max die with no connector. If that had been an accurate photo then would have required another die to compose an Ultra. But it appears that it s a slight deception (photoshopped the connector out, so could 'delight and surprise' several months later). At the M3 gen it appears there was two highly overlapping design dies. One without and one with the connector.

The Extreme , 4x Max, was more so the notion of the exact same die goes off into the weeds. 6-8 Thunderbolt ports is abnormally high. 16 has clearly gone into the ridiculous zone. 3 unused SSD controllers. 3 unused secure enclaves , etc. etc. ( perhaps take dies with dead TB provisioning, dead SSD controller, dead Secure Enclave and use the flush out around a die with the full working set. )

If split an "Extreme" allocation of cores targeting to increase in 'half' it would be substantively easier to glue those
two halves together without dragging along substantive amount of stuff that doesn't make a difference (and do not need more of). However, that decouples that new die from help being paid for by millions of MBP 14"/16" sales. The unit number go down and the costs go much higher (much bigger dies cost more).

Granted, obviously it’s been years since that talk, and it sounds like you know more than I about wafer size and production. Guess I was just mistaken

It was discussed/rumbled as an idea here on the forums. Just not particularly originating from Apple leaks.

 

[IvyKing]

The Extreme , 4x Max, was more so the notion of the exact same die goes off into the weeds. 6-8 Thunderbolt ports is abnormally high. 16 has clearly gone into the ridiculous zone.

Hmm, 16 Thunderbolt ports would be nice for making a fairly good sized cluster. One good have 12 Extreme boxes hooked to together with a dedicated link between any two of the boxes in the cluster.

I do wonder about the issues with memory access limiting throughput on the "Extreme", e.g. a core on one of the MAX nodes needing access to memory on another MAX node.