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Isn’t there some promise that laser/light processing might become viable with nanolens technology? I think IBM has some interesting light processor prototypes.

Heat wouldn’t be as much of a problem with light vs electrons.
 
Serious question. What happens when they get to 1nm? What’s the next step? .5, or some completely new technology all together?
"nm" has became a moniker many years ago and does not reflect the actual size. They will simply go with a new naming scheme.
 
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Let us hope this will materialize in 2026. I am interested to know the actual impacts on new iPhone in 2026 if this chip is indeed produced and used. It is like a smoke on the air at this point. Nothing to be seriously concerned.
 
Serious question. What happens when they get to 1nm? What’s the next step? .5, or some completely new technology all together?
Whatever Marketing Dept decides to call it. the "nm" term has had nothing to do with the size of circuitry, in many, many years. It is a marketing term.
 
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Apple learned a big lesson in releasing the M1 Macs back in Nov 2020. That is, you don't allow new generations of chip to come flying out of the blocks. They quickly learned that was a hard act to follow as the M2 chip was seen as nothing more than a speed bumped M1. For M3 Apple learned the lesson so that the new fab process will not allow all the dramatic gains to go out in the first iteration. M3 chips are neutered to only a 10% speed increase so that Apple can milk this in M4 and M5 generations. Then we get to this new fab process talked about here. It won't be generational but more neutering with a 10% spec increase to save the available additives for the following year's Macs.

All told, Apple Marketing is now following the Intel playbook to stretch technology gains over the lifetime of the fabrication tech. A truly garbage move by Apple.
What a fantastic take. Completely agree!
 
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Serious question. What happens when they get to 1nm? What’s the next step? .5, or some completely new technology all together?
nm is just a length like cm or km. In that specifically case not even the the physical dimension of the chips gates.

The next is pm (pico: 10e-12 meter)
Has nothing to do with technology. At least if you don’t look at the manufacturing
 
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Would be really cool that the first SoC built with the 2nm technology (and hopefully switching from FinFET to GAAFET), was the A20. “A20 Bionic, our fist 2nm chip.”

But I guess that depends more on TSMC and their roadmap. Let’s hope that the first 2nm chip will represent a much higher jump in performance/efficiency, not like the A17 Pro. Maybe the FinFET transistor technology is approaching its limits?
Isn't going from 5nm to 3nm a higher jump than going from 3nm to 2nm? The first is a full 40% size reduction, the second only a 33% one.
So, should we expect even less improvement in speed and/or battery life compared to what we just witnessed with the A17 chip?
 
This is why I prefer to replace my Macs, iPads & Watch 8-10 years later after their final Security Update.

I might do the same with the iPhone by 2027.

Raw performance, performance per watt and power consumption improvements would be the most pronounce by then.

At end of life hand it down or sell it to a collector.
Thank you for taking that choice. You're one of those who's actions have a positive impact on this planet.
Hats off to you!
 
0.2 nm, also known as 2 Å (for Ångström), is about as small as you can theoretically make anything with a semi-conductor material like silicon since that's the approximate distance between two atoms in the crystal. If we ever get anywhere near that with our current approach is debatable. Quantum effects become increasingly tricky to deal with as sizes shrink down to the level of atoms. More likely we'll have to hope for a major breakthrough somewhere else than shrinking transistors to keep advancing computing power at some point in the not too distant future.
Though note the marketing names don't represent the physical distances. The feature sizes for the current "3 nm" processes are quite a bit larger than 3 nm, and that will apply to "2 Å" as well. Thus you'd want to consider the quantum effects that correspond to the physical distances rather than the marketing names.
 
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Isn't going from 5nm to 3nm a higher jump than going from 3nm to 2nm? The first is a full 40% size reduction, the second only a 33% one.
So, should we expect even less improvement in speed and/or battery life compared to what we just witnessed with the A17 chip?
In theory, yes. We’ll see how the N3E process go, the next mass produced node inside the 3nm family. However, the N3B node used on the A17 Pro is not delivering the performance or efficiency we were expecting from this jump, that’s why I said that.
 
Isn't going from 5nm to 3nm a higher jump than going from 3nm to 2nm? The first is a full 40% size reduction, the second only a 33% one.
So, should we expect even less improvement in speed and/or battery life compared to what we just witnessed with the A17 chip?
its not proportional to physical size, its a marketing phrase.
 
Thank you for taking that choice. You're one of those who's actions have a positive impact on this planet.
Hats off to you!
I do not do this for benevolence or virtue signaling.

I do this as my use case has not changed since 2015 and for tax reasons.
 
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so no mba m2 upgrades in the foreseeable future. should I order an overly expensive mba m2 already or keep on waiting?
 
I miss the megahertz metric. It was a number that went up in the thousands then had that confusing stage when the numbers went down at least in 2 separate generations but the speed was faster anyways because of reasons. Having a metric that goes from 3 to 2 is not as exciting.

Think of it like debt then. Having debt go down is quite exciting... even more so if one doesn't see it as a reason to reload it again.
 
TSMC's 2nm GAA will focus on efficiency and low power performance which is ideal for Apple's designs. There will be less improvements in performance for the higher power designs that Nvidia focuses on.
Not quite the full story.

N2 brings two known separate, important improvements
- GAA. Better performing (faster switching, lower energy) transistors. Currently due late 2025 for TSMC
- BSPD. Move power lines to the back of the chip, reducing wiring congestion. Currently due 2026.

Note that neither of these exactly increases transistor density. Everyone will benefit from GAA in terms of higher GHz and lower W. Apple will benefit from BSPD since they are currently mostly limited by wiring density (hence the low density bump going to N3); nVidia will probably [I don't really know their design constraints] not benefit from the wiring density changes but both will benefit from the reduced power loss of BSPD (ie another small energy efficiency bump).

The most likely timing (but who can be sure) is an N2 with GAA then an N2+ with BSPD. But in principle the two could slide relative to each other, or even swap places. Of course Apple would like N2 ready for iPhones in 2025 but perhaps after the slippage on N3 (and forcing Apple to compromise on the A16) maybe neither want to take the risk? So maybe N2 iPhones in 2026, N2+ in 2027?
Of course there are other chips and other products! For example Apple might slip out some chip earlier on N2 for say Vision Pro...

At some point entering the mix is high-NA EUV. Right now no-one has given a timetable for that (except that the first machines should ship before the end of this year). Presumably, if there are no problems, this will be used for N2, giving higher density than otherwise expected; but high-NA EUV is not an essential part of N2 or N2+.
(Which means that numbers you see for N2 density relative to N3 are very tentative. Without high-NA EUV, N2 will be only 1.15x density of N3. Which is very much expected; the headliners for N2 are GAA and BSPD, not density.)
 
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If Intel executes on time, its 18A node will already have entered mass production. But that's a big IF.
Intel "Mass Production" is even more meaningless than TSMC mass production.
Intel will go through "mention", then "announce", then "manufacturing", then "releasing", then "shipping", and every one of these stages will be treated like the second coming. Meanwhile the gap between "mass production" and "can I buy it in Best Buy" will be a year or more.

Just don't be fooled. The same delay is kinda true on the Apple/TSMC side; the difference is that Apple doesn't trumpet it to the skies when in March they start manufacturing a chip you will only be able to buy in October.
 
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Not quite the full story.

N2 brings two known separate, important improvements
- GAA. Better performing (faster switching, lower energy) transistors. Currently due late 2025 for TSMC
- BSPD. Move power lines to the back of the chip, reducing wiring congestion. Currently due 2026.

Note that neither of these exactly increases transistor density. Everyone will benefit from GAA in terms of higher GHz and lower W. Apple will benefit from BSPD since they are currently mostly limited by wiring density (hence the low density bump going to N3); nVidia will probably [I don't really know their design constraints] not benefit from the wiring density changes but both will benefit from the reduced power loss of BSPD (ie another small energy efficiency bump).

The most likely timing (but who can be sure) is an N2 with GAA then an N2+ with BSPD. But in principle the two could slide relative to each other, or even swap places. Of course Apple would like N2 ready for iPhones in 2025 but perhaps after the slippage on N3 (and forcing Apple to compromise on the A16) maybe neither want to take the risk? So maybe N2 iPhones in 2026, N2+ in 2027?
Of course there are other chips and other products! For example Apple might slip out some chip earlier on N2 for say Vision Pro...

At some point entering the mix is high-NA EUV. Right now no-one has given a timetable for that (except that the first machines should ship before the end of this year). Presumably, if there are no problems, this will be used for N2, giving higher density than otherwise expected; but high-NA EUV is not an essential part of N2 or N2+.
(Which means that numbers you see for N2 density relative to N3 are very tentative. Without high-NA EUV, N2 will be only 1.15x density of N3. Which is very much expected; the headliners for N2 are GAA and BSPD, not density.)
Thank you for such a complete and detailed explanation of TSMC roadmap.
 
Intel "Mass Production" is even more meaningless than TSMC mass production.
Intel will go through "mention", then "announce", then "manufacturing", then "releasing", then "shipping", and every one of these stages will be treated like the second coming. Meanwhile the gap between "mass production" and "can I buy it in Best Buy" will be a year or more.

Just don't be fooled. The same delay is kinda true on the Apple/TSMC side; the difference is that Apple doesn't trumpet it to the skies when in March they start manufacturing a chip you will only be able to buy in October.
Intel showed off lunar lake today on Intel 18A. In a laptop running windows. It appears that Intel 18A is on track for 2025.
 
Not particularly creditable that they will get Intel 18 moving at the same time in any sort of respectable volume. Intel simply just doesn't have that many EUV fab machines . Indeed, from the same article quoting Gelsinger's comments.
Yeah - probably true in the time frame we’re talking about here, but Intel is investing a lot to pick up the ball they dropped (backed by Biden’s and the European Chips acts I suppose). At least I have more confidence in Intel delivering with Pat Gelsinger at the helm, but you do make some fair points…
 
Yeah - probably true in the time frame we’re talking about here, but Intel is investing a lot to pick up the ball they dropped (backed by Biden’s and the European Chips acts I suppose). At least I have more confidence in Intel delivering with Pat Gelsinger at the helm, but you do make some fair points…

The Chips Act isn't going to make ASML very high end system flow go much faster. A decent chunk of that money flush out mid-range and additional capacity not at the very high end.

The huge problem is that ASML only makes so many and TSMC and Samsung aren't going to stop ordering their 'fair share' either. There are very limited ways Intel can catch up in wafer volume. That is one reason their GPU (dGPU and now iGPU) line up is outsourced to TSMC. Intel can't really bring that in-house even if they wanted to.

There is a inflection point with the High NA EUV machines where Intel will have a chance to 'chop' the pie up into more even pieces. Intel got the first EX5000 scanner. But TSMC and Samsung will get theirs also. ( If Samsung ran into money problems maybe they could fall into the 'fall behind' role, but I wouldn't count them out just yet. ). Nvidia , AMD, and other AI/ML compute die vendors are pouring money on TSMC so they won't be 'too broke' to buy.

With "arriving ahead of schedule 18A" , Intel is trying to move what naturally would be better matched with EX5000-series machines down to EX3000. In some respects, this is the similar to the same mess they got into when they skewed budget away from EUV into more DUV infrastructure because they wanted to multipattern the older machines heavily to do denser stuff.

AMD (and Ampere/Arm/Amazon ) is taking share so the number of CPU they need to produce is going down to better match their small-ish supply of EUV machines. Plus Intel Foundry Services is suppose to be rounding up other 18A ( also consumers of same limited supply of EUV machines. ). Intel is aiming to expand their Foundry user base also. If they do too good a job of that then will Intel products slide out a bit? How they juggle that is an open question. ( so far have had many issues lining up consumers. )

If Intel pushes too much into the new Fabs too quick... what is in their older ones. ( there looks to be about zero uptick in external folks interested in using that capacity. ) . Gelsinger is doing a better job, but he is also walking a tightrope where he could get axed also if everything doesn't flow 'just right'.


And doing demos of Lunar lake before even ship Meteor Lake. That is kind of playing with fire also. We'll have an even better thing maybe in less than a year. That is a dual edged sword. If bend over so far backwards to solve the creditability problem that create "Osborne Effect" then just jumping out of the frying pan into the fire.
 
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