We can try to do a little back-of-the-napkin math on this. I'll do as much of this as I can off the top of my head.Originally posted by Hemingray
As to how this all calculates out, does anyone know if the current G5's are even close to max-ing out the current Hypertransport bandwidth? I'm also assuming that, like with FireWire or USB, Hypertransport 1.x can't be upgraded to 2.0.
The G5 has two HyperTransport links: a 16-bit one (3.2 GBps max) between U3 and the PCI bridge, and an 8-bit one (1.6 GBps max) between the PCI bridge and K2. The latter is connected to the following, with peak MBps numbers in bold (feel free to challenge/clarify me on the numbers, everybody
FireWire 100
USB 2.0 ~70 (not a typo; figure one port at 60 MBps and four others at 1.5 MBps each)
Ethernet 125
SATA 2 x 150
Digital audio: 6 channels x 2 ports x 48,000 samples/sec x 24 bits per sample = 1.6 (this is not significant, but I want to cover all the bases)
AirPort Extreme 6.75
ATA/100 100
OK, I don't think I forgot anything. 100 + 70 + 125 + 300 + 10 (rounding) + 100 = 705 MBps. That's about half of the theoretical max.
I chickened out just now and checked the website, and that appears to be correct. I did leave out the boot ROM and the PMU, because I figure their bandwidth is truly insignificant. But I'm not sure about a couple things: my impression is that there's only one FireWire bus for all three ports. Does anyone know if this is correct? Does it really mean that the maximum total bandwidth for FireWire is 800 Mbps = 100 MBps, or is there another 400 Mbps = 50 MBps for the FireWire 400 ports?
Now for the 16-bit link. On the 1.8 and 2.0 GHz configurations, there are three PCI-X slots on two buses. Let's suppose that each bus can run at 133 MHz (which is not supported by the block diagram, but what the heck). 133 MHz x 64 bits x 2 buses = 2.08 GBps. Add this to our 705 MBps number from before and we get 2.767 GBps, which is about 400-some MBps short of the max.
Now, we also have to consider that almost all the I/O bandwidth numbers I've mentioned have been for interfaces that can (theoretically) do them entirely in one direction. But 16-bit HyperTransport is only capable of 3.2 GBps in both directions simultaneously. It can only do 1.6 GBps in each direction. So that may be a design consideration. On the other hand, I have to figure it's pretty rare that every single interface on your system will be sending data to the processor at once (as opposed to being sent data), so HyperTransport would have a big advantage over a unidirectional bus like PCI (?) that would (I think) have a lot of overhead due to switching directions all the time.
It's also somewhat important to note that the number we're actually looking at is not 1.6 GBps, but 1.5625 GBps (someone divided by 1000 instead of 1024), and there's also some overhead due to the address multiplexing and other things that I don't understand much about.
FWIW
WM
For your edification:
That's from the developer note.