In November last year there was a rather interesting thread on AppleInsider (I know, YA AppleInsider quoting thread...

) with a speculation about the PowerBook G5's chip architecture.
Someone claimed to have inside knowledge about the chip architecture of this 'G5 Mobile' chip. The concept was to build 4 (four!) 440 cores (each with its own integer and AltiVec unit) onto one chip. Each core would only run at 700-800MHz but since the 440 is an embedded concept each core would consume just 1.5W of power max. And since those are cores on a single chip the speed between them would be really fast, much better than on current dual PowerMacs.
Effectively you would get a quad 800MHz (or '3.2GHz') 'G5 Mobile' PowerBook consuming 1/2 the juice of today's 1GHz G4 (i.e. resulting in twice the battery life) yielding a performance on properly threaded applications close to a 3GHz system. Not bad at all.
Since applications need to be specifically written to make maximum use of this new quad core design (loosely fashioned on the IBM Cell idea) the introduction would be at WWDC - as was claimed already back then in November 2003.
Here's the link to that admittedly old thread:
http://forums.appleinsider.com/showthread.php?s=&threadid=33983&ibm+440