Intel plans for 10-core chips around the bend?

[nanofrog]

I doubt Intel are working towards 10 core processors, but as the Westmere-EP quad cores are 6 core processors with 2 disabled it seems perfectly plausible a family that has 12 core processors could also include 8 or 10 core versions that involve disabled cores.

It's also a way of being able to sell otherwise defective parts (from original design) when say 1 - 2 cores fail during the binning process.

So it's possible such parts could show, but not by original design as you indicate (created as a 10 core parts).

 

[Hellhammer]

It's also a way of being able to sell otherwise defective parts (from original design) when say 1 - 2 cores fail during the binning process.

So it's possible such parts could show, but not by original design as you indicate (created as a 10 core parts).

Yea, that's likely the case. Same as AMD (I'm sure Intel has as well) has done for long time, sell "defective" x4 as x2 or x3. Unlocking those extra cores is quite popular as well because you can get +3GHz quad-core for less than 100$ and I think there is motherboards with utility that automatically unlocks them.

 

[Ice Dragon]

Yeah I'm in the fake camp as well. I could so see a person who works at Intel rushing to get home to get on 4chan of all places to break this sort of news. *sarcasm*

 

[nanofrog]

Unlocking those extra cores is quite popular as well because you can get +3GHz quad-core for less than 100$...

That is nice when possible. Makes for great inexpensive DIY NAS systems BTW (though some might consider a Quad core overkill).

 

[Hellhammer]

That is nice when possible. Makes for great inexpensive DIY NAS systems BTW (though some might consider a Quad core overkill).

Yeah, it really is Those two extra cores are nice if you convert or live transcode something.

I work in a computer shop and quite many people has asked is it hard etc, but in some mobos, you just uncheck two boxes in BIOS and that's it, two extra cores for free! Very popular for gamers who are on budget as you can get a quad core gaming rig with 4GB RAM and ATI 5770 for less than 500€!

I wonder does my Core 2 Duo have extra cores

 

[DoFoT9]

Yeah, it really is Those two extra cores are nice if you convert or live transcode something.

I work in a computer shop and quite many people has asked is it hard etc, but in some mobos, you just uncheck two boxes in BIOS and that's it, two extra cores for free! Very popular for gamers who are on budget as you can get a quad core gaming rig with 4GB RAM and ATI 5770 for less than 500€!

I wonder does my Core 2 Duo have extra cores

gamers dont even need quad core!

intel/AMD SHOULD be working on 4GHz+ stock CPUs for gamers, cheap yet awsome. until the developers start producing the quad core compatible games, hardly anybody needs it

maybe your C2D has a 3rd core somewhere! goodluck unlocking that with EFI

 

[Hellhammer]

gamers dont even need quad core!

intel/AMD SHOULD be working on 4GHz+ stock CPUs for gamers, cheap yet awsome. until the developers start producing the quad core compatible games, hardly anybody needs it

maybe your C2D has a 3rd core somewhere! goodluck unlocking that with EFI

They have to leave some work for overclockers too!

I'm looking at my system information now, look what I got!
Looks like my iMac is some kind of a prototype

 

[nanofrog]

Yeah, it really is Those two extra cores are nice if you convert or live transcode something.

I'm likely to run enough disks that a single array isn't really feasible, so the additional cores allows the software setup to run multiples simultaneously (single threaded). Assuming max of 3 arrays + 1 for OS to have dedicated cores (even if they spend time in idle states, particularly the OS).

And I'd have to look, but I'm thinking that some of the software implementations have enabled multi-threaded operation to 2 cores per instance (ZFS for example; it would make sense IMO, particularly for Z-RAID1 or 2).

I wonder does my Core 2 Duo have extra cores

It would be nice, but... The process is more consistent the lower the core count, as there's less wafer surface per part. "Duds" just get crushed and recycled for their materials.

gamers dont even need quad core!

There are those who multitask.

intel/AMD SHOULD be working on 4GHz+ stock CPUs for gamers, cheap yet awsome. until the developers start producing the quad core compatible games, hardly anybody needs it

That's how chip makers see the OC capabilities they've made available IMO.

It allows them to avoid solving technical issues that will be very expensive to overcome. And when they do, you can bet it won't be cheap.

maybe your C2D has a 3rd core somewhere! goodluck unlocking that with EFI

I've the impression it's a PC, not a Mac, as the sig indicates Nehalem based (hint: DDR3).

EDIT: He beat me to it, as I was still typing.

 

[iMacmatician]

So it's possible such parts could show, but not by original design as you indicate (created as a 10 core parts).

Yeah that's pretty much what I meant. I assumed the /b/ guy was talking about 10 cores by design.

Sandy Bridge EX is a 4P CPU that will be placed between Sandy Bridge EP and Westmere EX in ~mid 2011, so I doubt it will have more cores than Westmere EX. Any reason why Sandy Bridge EX is (assuming the report is true) 4P and not 8P besides market differentiation from Westmere EX? First thing I thought of was differentiation but an Intel version of AMD's 4P dual-die Magny-Cours also comes to mind.

My guesses are 6/8 cores for Sandy Bridge EP and 8/12 for Sandy Bridge EX, assuming that the latter is single-die (more likely than dual-die I think).

 

[DoFoT9]

They have to leave some work for overclockers too!

I'm looking at my system information now, look what I got!
Looks like my iMac is some kind of a prototype

yea yea smart arse

I'm likely to run enough disks that a single array isn't really feasible, so the additional cores allows the software setup to run multiples simultaneously (single threaded). Assuming max of 3 arrays + 1 for OS to have dedicated cores (even if they spend time in idle states, particularly the OS).

And I'd have to look, but I'm thinking that some of the software implementations have enabled multi-threaded operation to 2 cores per instance (ZFS for example; it would make sense IMO, particularly for Z-RAID1 or 2).

would the read/write of the communications bus be the bottleneck though? i mean, even if you do have say, 3 RAIDs, you can only send one chunk of data from one HDD RAID at a time? or not :\

There are those who multitask.

true, im sure there are quite a few people that run algorithms whilst playing the latest games at workies! haha

That's how chip makers see the OC capabilities they've made available IMO.

It allows them to avoid solving technical issues that will be very expensive to overcome. And when they do, you can bet it won't be cheap.

sooo to save themselves money, they drop off a few cores? well thats just stupid. its like buying a car with 8 potential cylinders, but only allowing 6! what on earth :\

I've the impression it's a PC, not a Mac, as the sig indicates Nehalem based (hint: DDR3).

EDIT: He beat me to it, as I was still typing.

you type too slow old man . that computer is too slow for the internet usage that i require. faster plux.

 

[jtara]

Well, anyway, why does a gamer care about a 10-core chip to begin with? If real, this isn't a gaming chip - it's a server chip. In the past, server chips have also made good gaming chips and graphic workstation chips. But with multi-core chips, the equation has changed.

 

[iMacmatician]

I wonder does my Core 2 Duo have extra cores

maybe your C2D has a 3rd core somewhere! goodluck unlocking that with EFI

There's a few more in there…

 

[DoFoT9]

There's a few more in there…

but those "cores in a core" only work when the parent "core" is being used.

 

[iMacmatician]

but those "cores in a core" only work when the parent "core" is being used.

Spoilsport…

 

[DoFoT9]

Spoilsport…

hey, you baked the cake - i just put the icing on it!

 

[nanofrog]

Any reason why Sandy Bridge EX is (assuming the report is true) 4P and not 8P besides market differentiation from Westmere EX?[/.QUOTE]
The interconnect bus would be scaled down (but done intentionally to create a product point).

My guesses are 6/8 cores for Sandy Bridge EP and 8/12 for Sandy Bridge EX, assuming that the latter is single-die (more likely than dual-die I think).

They're going to be single die.

would the read/write of the communications bus be the bottleneck though? i mean, even if you do have say, 3 RAIDs, you can only send one chunk of data from one HDD RAID at a time? or not :\

If there's more data than can be transferred across it, then Yes. But QPI was a substantial improvement in this regard (what we have in the Nehalem's is cut down, but it's full scale on the 75xx parts - much more band than is possible in DP systems).

sooo to save themselves money, they drop off a few cores? well thats just stupid. its like buying a car with 8 potential cylinders, but only allowing 6! what on earth :\

That's not what usually happens though. I meant in being able to get a CPU to run at higher frequencies, the current processing isn't really capable of getting high yeilds at those clocks.

That's why they bin them in the first place (well, one of the reasons). It allows them to grade the speed they're stable at, and find units with portions out of spec (or even non-functional). So the end result is both what parts are marked as what P/N (clock speed), and whether or not parts will be sent to the nano surgery section for modification (i.e. made into a P/N with fewer cores, when it had more to start with, as something failed).

 

[DoFoT9]

If there's more data than can be transferred across it, then Yes. But QPI was a substantial improvement in this regard (what we have in the Nehalem's is cut down, but it's full scale on the 75xx parts - much more band than is possible in DP systems)./quote]
true. but if i have 3 separate RAIDs running on the computer, each performing a particular task - data is being transferred to and from these 3 RAIDs to the CPU, along QPI etcetc, then at some stage, if bus usage is >33% from each drive, then there will be slow downs? this is regardless of clocks/cores etc.

That's not what usually happens though. I meant in being able to get a CPU to run at higher frequencies, the current processing isn't really capable of getting high yeilds at those clocks.

That's why they bin them in the first place (well, one of the reasons). It allows them to grade the speed they're stable at, and find units with portions out of spec (or even non-functional). So the end result is both what parts are marked as what P/N (clock speed), and whether or not parts will be sent to the nano surgery section for modification (i.e. made into a P/N with fewer cores, when it had more to start with, as something failed).

are the CPU upgrades even needed at the moment though? for certain things, yea ok fair enough. but what about increasing disk I/O speeds - increases that will help the greater majority. 98% of users dont require a faster CPU...

(sorry for late reply).

 

[nanofrog]

are the CPU upgrades even needed at the moment though? for certain things, yea ok fair enough. but what about increasing disk I/O speeds - increases that will help the greater majority. 98% of users dont require a faster CPU...

(sorry for late reply).

The interconnect bus really only benefits the enterprise market ATM, and for certain uses (important ones though), not unilatterally.

As per addressing disk I/O, it's possible to solve now. The issue is cost. SSD and/or RAID implementations would up the price more than users would pay. Since not everyone needs it, or is willing to pay (included in the system), such things are up to the user as upgrades.

There are attempts to improve matters on the cheap side (i.e. SATA 6.0Gb/s is just arriving), but that really means SSD's have to come way down in price, improve write reliability, and the capacity needs to increase as well (will still maintaining a very low cost/GB).

That's not going to happen overnight though, as it means changes in the production process aspect of the Flash chips (i.e. different forms that's more reliable such as FeRAM, and at extremely high volumes to keep prices low = not good for quick R&D recovery for such an expensive area). Fab development isn't cheap.

 

[iMacmatician]

According to PC Watch, Westmere-EX will indeed be 10-core.

There's also a bunch of new info on Sandy Bridge and Ivy Bridge variants.

 

[Hellhammer]

According to PC Watch, Westmere-EX will indeed be 10-core.

There's also a bunch of new info on Sandy Bridge and Ivy Bridge variants.

Interesting.. Thanks! On the other hand, there might be a 12-core and then a 10-core version of it, hard to say. I think this is still pretty much speculation as Intel has confirmed nothing, I guess?

 

[nanofrog]

Interesting.. Thanks! On the other hand, there might be a 12-core and then a 10-core version of it, hard to say. I think this is still pretty much speculation as Intel has confirmed nothing, I guess?

This would make the most sense to me. It's more likely the design would start out as a 12 core, and a 10 core part would be a 12 core unit with 2x disabled (to allow for otherwise failed parts during the binning process to be sold).

I'll wait for Intel to make publish something formally, or at least a leak from a reputable source before I believe that they've designed a 10 core part from the ground up (not the result of disabled cores on a larger count part).

 

[DoFoT9]

The interconnect bus really only benefits the enterprise market ATM, and for certain uses (important ones though), not unilatterally.

right, only the enterprise markets can benefit from the new interconnect technologies? and specific software/hardware at that i guess

As per addressing disk I/O, it's possible to solve now. The issue is cost. SSD and/or RAID implementations would up the price more than users would pay. Since not everyone needs it, or is willing to pay (included in the system), such things are up to the user as upgrades.

thats life though, you want fast - you have to pay for it. not that anybody needs those sort of speeds in the home user sense.

There are attempts to improve matters on the cheap side (i.e. SATA 6.0Gb/s is just arriving), but that really means SSD's have to come way down in price, improve write reliability, and the capacity needs to increase as well (will still maintaining a very low cost/GB).

That's not going to happen overnight though, as it means changes in the production process aspect of the Flash chips (i.e. different forms that's more reliable such as FeRAM, and at extremely high volumes to keep prices low = not good for quick R&D recovery for such an expensive area). Fab development isn't cheap.

i saw a review of a WD SATAIII hard drive, it wasnt any faster then the SATAII - give it a few months. i thought the limitations were more with the physical reading of the data, not the interface itself?

According to PC Watch, Westmere-EX will indeed be 10-core.

There's also a bunch of new info on Sandy Bridge and Ivy Bridge variants.

does 10 or 12 core even seem logical? im just trying to think it out properly. look at RAM, its always been powers of 2. 1MB/2MB/4MB/ etc. now its 1GB/2GB/4GB/8GB etc. i presumed CPUs would be the same, 1/2/4/8/16. we are nearly at the 8 stage. maybe they will develop 10, to allow for this "binning" process that nano described.

 

[malcolm233391]

I wouldn't expect to see these chips in the mac pro line. They would be in or above the Nehalem-EX price ranges.

 

[nanofrog]

right, only the enterprise markets can benefit from the new interconnect technologies? and specific software/hardware at that i guess

For the moment, Yes, as that's the only area that has software that can utilize it. Consumer grade software is just too far behind, and will remain so for awhile given the development methods and practical limitations (i.e. retain some degree of backwards compatibility, and keep the development time and costs as low as possible, so there's not likely going to be concurrent optimizations for different CPU families without the previous family already being developed).

i saw a review of a WD SATAIII hard drive, it wasnt any faster then the SATAII - give it a few months. i thought the limitations were more with the physical reading of the data, not the interface itself?

Mechanics will prevent current HDD's from being able to utilize the additional band (1x disk per SATA port). Multiples attached via a PM enclosure (SAS expanders in the case of SAS controllers as it follows suit) could exceed 3.0Gb/s though, and it's really important for SSD's to exceed current throughputs (already hitting very near if not at the real world limit of SATA II @ 3.0Gb/s).

I wouldn't expect to see these chips in the mac pro line. They would be in or above the Nehalem-EX price ranges.

Asssuming both articles have enough grain of truth, they wouldn't be. They're MP (Multi Processor) parts and will be a newer generation of the 7xxx family, not SP or DP lines.

But my point's been that there's a difference between creating a 10 core chip from the beginning of the design process vs. a larger core count and reducing the functional core count to utilize parts that 1 - 2 cores failed the binning process. It just doesn't make financial sense to do this IMO, and is a methodology that Intel's done before.

 

[iMacmatician]

Interesting.. Thanks! On the other hand, there might be a 12-core and then a 10-core version of it, hard to say. I think this is still pretty much speculation as Intel has confirmed nothing, I guess?

Nothing's been confirmed but PC Watch has been quite reliable in the past.

We don't know for sure, but I think it's more likely Westmere-EX is native 10-core than 12-core with 0 or 2 cores disabled because on some of the other upcoming CPUs they show differing core counts on what appears to be the same chip. (Sandy Bridge-EN…are they really going to disable up to 6 cores?? ) Early rumors on Westmere-EX stated 12 cores so I think that's still a possibility.

I'll wait for Intel to make publish something formally, or at least a leak from a reputable source before I believe that they've designed a 10 core part from the ground up (not the result of disabled cores on a larger count part).

We'll probably know for sure at the IDF in a few days anyway.

does 10 or 12 core even seem logical? im just trying to think it out properly. look at RAM, its always been powers of 2. 1MB/2MB/4MB/ etc. now its 1GB/2GB/4GB/8GB etc. i presumed CPUs would be the same, 1/2/4/8/16. we are nearly at the 8 stage. maybe they will develop 10, to allow for this "binning" process that nano described.

I think it's a weird number but I don't know if there's any technical reason preventing a native 10-core CPU

The bigger surprise for me is why Intel isn't going 12/16 core with Westmere-EX, especially with 16-core Interlagos coming next year from AMD.