M4+ Chip Generation - Speculation Megathread [MERGED]

[MegaBlue]

You're looking at averages. It's been 3 generations. Hardly worth using averages. Instead, look at the last 3 generations and see that the M series followed the A series by 1 month in 2/3 generations with the lone exception the crazy covid years.

If you're going to say my theory is invalid because it's only been 3 generations, then your theory is also invalid because it's only been 3 generations. The M chips have only existed since COVID and the world is still permanently affected, with some industries still in the process of recovering, and others course-correcting after decisions during COVID proved to not be profitable long-term.

Anyways, Gurman says M4 later this year which means 1 year cadence and following the A series closely again.

Also, I love Mark Gurman, but his word is not the end-all be-all of what Apple does. He's often in the right ballpark, but how many times were we supposed to see new iPads by now?

Also, M2 came 9 months after the A15? It's been 3 generations. Hardly worth using the time after the A chip. Instead, look at the last 3 generations and see that the M Ultra chip followed the M chip by roughly 1.5 years 😉

Would be awkward with M4 Max out in a 16” MBP beating out the Ultra tier studio and Mac Pro stuck on M2U though wouldn’t it?

I feel pretty convinced of wwdc M3U

If M3U doesn't come at WWDC, then I'd say it would mean one of two things:
1) M3U debuts in the Fall, M4 in the early part of 2025
2) There is no M3U, and M4 debuts in the Fall with M4U in early 2025.

If they do the second, then that makes me think there would be just M4 with M4P and M4M coming later, to avoid what you're talking about.

This is also Apple, who makes completely weird and arbitrary decisions with their product lineup sometimes, so anything can happen.

 

[casperes1996]

If they do the second, then that makes me think there would be just M4 with M4P and M4M coming later, to avoid what you're talking about.

I could see this happening, with Max and Ultra launching simultaneously in MacBooks Pro and Studio/Mac Pro. And initial launch being limited to iMac, Mini and Air maybe. But then Air could be faster than base MacBook Pro unless it gets updated to M4 with all the higher end Pros being on M3P/M chips - Something a little more akin to M1's launches

 

[tenthousandthings]

You're looking at averages. It's been 3 generations. Hardly worth using averages. Instead, look at the last 3 generations and see that the M series followed the A series by 1 month in 2/3 generations with the lone exception the crazy covid years. [...] I don't know why people still think it's 18 months based on one lone covid generation.

No, people think that because the M series jumped over the A16, just as a planned 18-month cadence predicts.

It’s conceivable that M4 could come early, due to N3E being ready now and so why not? But that is predicated on A18/M4 being on N3E, which is an iffy proposition. N3E was ready sooner than TSMC said, so, in turn, N3P may also be ready sooner than TSMC said.

 

[senttoschool]

Perhaps because of previous experiences with the accuracy of Gurman’s schedule predictions.

He's been absolutely spot on more often than not.

 

[Burnincoco]

Steve Jobs speaks to me directly through a Power Mac G4 Cube.
He says October 31 2024, Hella Fast event
M4, Ultra, Max and Pro on Mac Pro, Studio, MacBook Pro

 

[Boil]

Steve Jobs speaks to me directly through a Power Mac G4 Cube.
He says October 31 2024, Hella Fast event
M4, Ultra, Max and Pro on Mac Pro, Studio, MacBook Pro

The hardware focus for WWDC 2024 will be the preview of the all-new M4 Extreme SoC & the Mac Pro Cube...! ;^p

 

[Mac_fan75]

I could see this happening, with Max and Ultra launching simultaneously in MacBooks Pro and Studio/Mac Pro. And initial launch being limited to iMac, Mini and Air maybe. But then Air could be faster than base MacBook Pro unless it gets updated to M4 with all the higher end Pros being on M3P/M chips - Something a little more akin to M1's launches

M4U first and then the rest (lowest last) would make more sense. Also I REALLY hope they release MacBook Pro and MacStudio hardware around the same time. I own a M3 Air and M2 MAX Studio, but hell no I will buy a M3 Max Studio now the hardware is >6 months old, simply makes no sense, or no sense to me

 

[MayaUser]

Steve Jobs speaks to me directly through a Power Mac G4 Cube.
He says October 31 2024, Hella Fast event
M4, Ultra, Max and Pro on Mac Pro, Studio, MacBook Pro

dont see Mac Studio/pro to get M4 Ultra if at WWDC they will get M3 Ultra

 

[tenthousandthings]

I'm hoping for a shift in the M3 Ultra packaging at WWDC 2024, which would then carry through to the M4 generation.

The TSMC slide that was used most in the articles about M1/M2 UltraFusion when TSMC confirmed that the Ultra was using InFO_LSI (LSI = "local silicon interconnect") is this: [Anandtech]

Apple was on the cutting edge here, and the M1 Ultra was the first consumer product to use InFO_LSI. You'll notice in the slide that InFO_LSI is being presented as an advance over InFO-oS (oS = "on substrate"), but if you go looking for current information about InFO_LSI on TSMC's site today, you won't find it. Instead, InFO-oS is featured: [TSMC 3DFabric]

If you follow the links in "The Chronicle of InFO" graphic, the most recent is from 2021, about GLink 2.0, which discusses advances with regard to efficiency on the die edge. More recently (September 2023), TSMC has listed "10x productivity gains" in substrate routing: [TSMC] and we know that Advanced Backend Fab 6 opened in June 2023.

So there is reason to hope that something big is in the works for UltraFusion.

 

[Mac_fan75]

dont see Mac Studio/pro to get M4 Ultra if at WWDC they will get M3 Ultra

Well I am not a MaxTech believer but they do have a point that there will be no M3 Ultra because firstly it has no connecting bus and secondly if it is a unique design why name it M3 and then introduce M4's, and starting with a M4 Ultra and then go slowly introduce the other would make more sense.

 

[Beau10]

I'm hoping for a shift in the M3 Ultra packaging at WWDC 2024, which would then carry through to the M4 generation.

MaxTech (I know, I know) just released a video speculating there won't be an M3 Ultra due to the lack of a fusion portion on the M3 Max chip, and that instead the next chip will be an M4 Ultra released before the rest of the M4 class... on the new node and no longer a fusion type chip, but totally reconfigured without an unnecessary doubling of resources (neural engine, etc). Also, no more low power cores. A wholly new chip basically.

Would be great if the memory bandwidth was also really uncorked, 1000+. With 256gb on board it would be an incredible inference machine for the most advanced local models. Command R+ and the new Mixtral are getting closer to the premium cloud offerings

 

[tenthousandthings]

Well I am not a MaxTech believer but they do have a point that there will be no M3 Ultra because firstly it has no connecting bus and secondly if it is a unique design why name it M3 and then introduce M4's, and starting with a M4 Ultra and then go slowly introduce the other would make more sense.

See my post immediately above yours, the lack of a local silicon interconnect (your “connecting bus”) on M3 Max doesn’t mean they aren’t using InFO packaging for M3 Ultra, it just means they aren’t using InFO-LSI.

 

[Mac_fan75]

See my post immediately above yours, the lack of a local silicon interconnect (your “connecting bus”) on M3 Max doesn’t mean they aren’t using InFO packaging for M3 Ultra, it just means they aren’t using InFO-LSI.

Yeah sorry totally right, but still releasing a M3 Ultra in June while again in a few months new M4's are coming isn't smart in a commercial way, for the ones who know don't care as Ultra buyers should know what they buy.

 

[tenthousandthings]

MaxTech (I know, I know) just released a video speculating there won't be an M3 Ultra due to the lack of a fusion portion on the M3 Max chip, and that instead the next chip will be an M4 Ultra released before the rest of the M4 class... on the new node and no longer a fusion type chip, but totally reconfigured without an unnecessary doubling of resources (neural engine, etc). Also, no more low power cores. A wholly new chip basically. […]

While I believe they are still using fusion (InFO-oS) packaging and MaxTech is jumping to unfounded conclusions about the absence of the local silicon interconnect, the rest of what you’re saying holds true, and I think, with improved substrate performance, it might be possible to introduce a second chip that addresses some of the things you mention. So you’d have an M3 Max paired via updated UltraFusion with a new, enhanced, dedicated M3 variant…

 

[smalm]

MaxTech ist stating the UltraFusion part is missing on M3 Max.
It doesn't matter whether InFO-LSi or InFO-oS is used to connect the chips, without the UltraFusion interface there is nothing to connect to.

 

[tenthousandthings]

MaxTech ist stating the UltraFusion part is missing on M3 Max.
It doesn't matter whether InFO-LSi or InFO-oS is used to connect the chips, without the UltraFusion interface there is nothing to connect to.
View attachment 2368129

"UltraFusion" is Apple's marketing name for its implementation of InFO-LSI on the M1 Max and M2 Max. The thing you see along the bottom (that you are calling UltraFusion) is the "LSI" (local silicon interconnect). But there are other types of InFO packaging on substrate that don't use an LSI. If Apple were to use one of those, the LSI would go away, and it appears that it has. But Apple will still call it "UltraFusion" because ultimately that just means InFO (integrated fan-out) packaging, or really any other advanced packaging they might use.

 

[mr_roboto]

It’s in newer A chips sure. But it wasn’t there before firestorm and ice storm that would go into M1 and A14, right? I see no purpose for it in an iOS world

It’s true, it was introduced in Firestorm.

Although it's quite true that there's no purpose for TSO in iOS devices, Apple introduced it at least two generations before M1, in A12. You may recall that the Mac developer transition kits were an A12Z based motherboard inside a Mac Mini chassis. Those DTK units had TSO support.

It wasn't fully mature yet. For example, it was only present in A12's performance cores. On the dev kits, the kernel would refuse to schedule Rosetta processes on E cores. But it was there, and it made sense for it to be there. The best way for Apple to work on Arm Macintosh while giving themselves a long runway was to slipstream Mac features into A-series chips so they'd have real hardware platforms to bootstrap and test on, possibly years before going public.

On that note, it wouldn't shock me if TSO and other Mac features also exist in A10 and A11. As long as the area penalty wasn't much and it didn't put the yearly A-series launch schedule at risk, why wouldn't they?

 

[Burnincoco]

"UltraFusion" is Apple's marketing name for its implementation of InFO-LSI on the M1 Max and M2 Max. The thing you see along the bottom (that you are calling UltraFusion) is the "LSI" (local silicon interconnect). But there are other types of InFO packaging on substrate that don't use an LSI. If Apple were to use one of those, the LSI would go away, and it appears that it has. But Apple will still call it "UltraFusion" because ultimately that just means InFO (integrated fan-out) packaging, or really any other advanced packaging they might use.

I didn't understand anything but it sounds about right. I once planted a seed in substrate so I know what I'm talking bout

 

[MayaUser]

Well I am not a MaxTech believer but they do have a point that there will be no M3 Ultra because firstly it has no connecting bus and secondly if it is a unique design why name it M3 and then introduce M4's, and starting with a M4 Ultra and then go slowly introduce the other would make more sense.

for some even the M3 max was different compared to what they were used to back in the m1max m2max era but it is still called M3 Max
So M3 Ultra i expect to hit the WWDC, if not, then, i hope mac pro and mac studio go straight to M4 family in the late 2024
Those guys also believed that M3 could arrive before iphone 3nm because of x y reasons...just ignore them, they just fire some "logical" points from their point of view (not apples) just for clicks

 

[deconstruct60]

"UltraFusion" is Apple's marketing name for its implementation of InFO-LSI on the M1 Max and M2 Max. The thing you see along the bottom (that you are calling UltraFusion) is the "LSI" (local silicon interconnect).

That is not the LSI chip of InFO-LSI, that is where the Max die provisions the connections to the LSI chip.

Info-LSI

3DFabric: The Home for TSMC’s 2.5D and 3D Stacking Roadmap

www.anandtech.com

The LSI chip is below the chips. Apple's animation when they introducted the M1 Ultra was just as deceptive as the original M1 Max photo ( which was photoshopped).

The static Ultra shot shows that those "to LSI" provisioning connector is on both dies.

Apple unveils M1 Ultra, the world’s most powerful chip for a personal computer

Apple today announced M1 Ultra, the next giant leap for Apple silicon and the Mac.

www.apple.com

Apple has covered the underlying LSI die in this picture ( because that is how InFO-LSI works). It is a very short distance connection.

Apple's video (same press release ) in the section below the above picture first removes the photoshopping that Apple did ( It isn't attached to the Max die. It is the part they choose to hide before the Ultra was announced. )
If stop the video before they close the two Max dies together there is a 'trench' with a bunch of connectors they illustrate down in that gap. That is a representation of the LSI die that is sitting underneath. Then they close it (which is nothing like the actual physical mounting process ). If pause after the close can see there is an outline of something underneath the two dies that spans the edge of both.


If you took away the LSI-like "ultra small" I/O pads to do the connections then likely that area would get even bigger and consume relatively lots more power. Other InFO options are not tractable in either die space consumed or power.

But there are other types of InFO packaging on substrate that don't use an LSI. If Apple were to use one of those, the LSI would go away, and it appears that it has. But Apple will still call it "UltraFusion" because ultimately that just means InFO (integrated fan-out) packaging, or really any other advanced packaging they might use.

Going to have problems being "Ultra" when have 10,000 connections to do that soak up more space and power. Have to meet the bandwidth and latency challenges also. UltraFusion is wide-and-efficient not narrow and throw power at the problem. If increase the i/O pad pitch the number of connections goes down. Which means not a wide. Which means will bleed aggregate bandwidth.

For example, the LDDPR5 connections (along the longer sides) are at least an order of magnitude fewer and consume more aggregate space.



P.S. for the MBP 14"/16" that "bridge to nowhere" allocation is wasted wafer area. It is very small if just looking at a single chip, but if sell 5-10M Max chips over several years that will add up in aggregate. As N3 generation and N2 generation wafers cost more and more it becomes an increasingly more costly and waste of capacity/time.

 

[deconstruct60]

I'm hoping for a shift in the M3 Ultra packaging at WWDC 2024, which would then carry through to the M4 generation.

The TSMC slide that was used most in the articles about M1/M2 UltraFusion when TSMC confirmed that the Ultra was using InFO_LSI (LSI = "local silicon interconnect") is this: [Anandtech]

Apple was on the cutting edge here, and the M1 Ultra was the first consumer product to use InFO_LSI. You'll notice in the slide that InFO_LSI is being presented as an advance over InFO-oS (oS = "on substrate"), but if you go looking for current information about InFO_LSI on TSMC's site today, you won't find it. Instead, InFO-oS is featured: [TSMC 3DFabric]

InFO-oS is featured because the current mania is making massive "AI training compute" packages that span multiple reticle size. Info-LSI trades higher point to point bandwidth for smaller package size ( at 1x reticle limit ). It is doubtful that Apple is really wants to make the most expensive package possible while tossing Perf/Watt out the window.

If you follow the links in "The Chronicle of InFO" graphic, the most recent is from 2021, about GLink 2.0, which discusses advances with regard to efficiency on the die edge. More recently (September 2023), TSMC has listed "10x productivity gains" in substrate routing: [TSMC] and we know that Advanced Backend Fab 6 opened in June 2023.

that "productivity gains" is in design not the chips. It is just making it so that the common tools many folks use for chip design has designing for these contexts built in. That totally aligns with TSMC's particular in UCI-e standard chiplet interconnect efforts. I highly doubt Apple is a super-fan of UCI-e. They have UltraFusion before those tools arrived for everyone else so they either have their own custom stuff or some collaboration with a tool vendor.

As for Glink ... it is for InFO-So

"... Die edge is the scarcest resource and GLink-2.0 allows the most efficient use of it by transferring 1.3 Tbps of full duplex traffic per every mm of beachfront. ...
...
... GLink has redundant lanes to replace faulty ones during production tests or in the field. ...
...
The next GLink versions using TSMC 5nm and 3nm technologies will support 2.5 Tbps/mm, error-free full duplex traffic with similar power consumption...
...
...
We are developing our IPs for integration in a harsh environment of >1000W, many-reticle size ASICs. "

Apple isn't trying to make 1000W packages. UltraFusion does 2TB/s which is 16Tb/s. Glink-2.0 would need 12-13 mm to cover that. The M1 Max was about 19 wide.

Apple Announces M1 Pro & M1 Max: Giant New Arm SoCs with All-Out Performance

www.anandtech.com

But M1 UltraFusion was a 2021 memory subsystem. The "next gen" Glink is better but Apple also needs to crank up the chip-to-chip bandwidth also for 2024-2025 timeframe if steeping up past plain LPDDR5.

The M2 Max and M3 Max have increasingly gotten bigger also. ( may be a dual edged sword because the inter-die bandwidth is likely changing also for at least the M3. )

So there is reason to hope that something big is in the works for UltraFusion.

That doesn't mean it is going to disappear from consuming die area. If Apple upgrades/changes the internal backhaul network on the intra=die network then "UltraFusion" would have to change/upgrade also.

if there are expensive yield problems with InFO-LSI I could see Apple walking away , but their laser focus on Perf/Watt probably keeps them tied to InFO-LSI .

 

[streetfunk]

new rumors vs. M4 releases

MacRumors: Apple News and Rumors

Apple News and Rumors

www.macrumors.com

low end market first ?
what´s the logic behind that ?
=>
Not intended to sidetrack towards that sales thing.
Please open a new thread for this, rather than picking up on that right here.

 

[mr_roboto]

The LSI chip is below the chips. Apple's animation when they introducted the M1 Ultra was just as deceptive as the original M1 Max photo ( which was photoshopped).

"Deceptive"? Get a grip. The animation doesn't even show the silicon bridge, you just get a light show and squiggly wire-lines to suggest communication between the Max die as they slide towards each other and stop edge-to-edge. It's kinda obvious that this is not intended as a serious depiction of physical reality.

Furthermore, the light show actually ends up on the correct side in the animation, so I'm not sure what you're even complaining about. The two Max die slide together above it, and below both is the package substrate. That's correct!

You might as well be complaining that the active layer of the Max dice is depicted even though technically it should be hidden and all you should be able to see is the featureless back side of the dice, but once more, who cares. These images are for laymen whose eyes would glaze over at 100% accurate un-edited SEM pictures.

Speaking of which, did you know that virtually all die photos provided by all manufacturers are, by your standards, lies? The outermost metal layers are power distribution. If they were showing you a true picture, it would look quite featureless since a bunch of power and ground planes would be hiding most of the interesting structure. When you see a whole wafer like this:

https://www.intel.com/pressroom/kits/45nm/images/t09.jpg

it's a wafer which they never finished all the manufacturing process steps on, for one reason or another, and decided to give it to marketing for "lies" (oops I mean pretty photos). Other times, what you get to see is an image taken of an individual die after decapping it (removing it from its package) and delayering it (using chemical and/or mechanical polishing processes to remove some or all metal layers).

Sorry for the rant but it's annoying to see people complain that Apple's chip marketing images are a little unreal. Of course they are. If they looked real they'd be boring. Everyone does some level of alteration, for very understandable reasons, and nobody who works on chips for a living cares. Move along.

 

[smalm]

this is the LSI of M1 Ultra

and where it is situated.

 

[Guenter]

We can say that a larger portion of the m4 will be used by the ai units, leaving less room for improvements on the cpu and gpu side.
I expect that improvements for cpu ang gpu compared to m3 will be minor.
I am no expert on ai, are there reasons that larger ai units require or strongly benefit from more ram?
If not i dont think the base ram will stay at 8 GB, may be 12 GB but not more.