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Not a good sign. Maybe a confusion on the memory controller on whether to recognise and allocate 4GB or just 3.3GB.

Yeah, I'd say it's either that or maybe the memory itself is just bad. I'd try the memtest with just one of the two sticks installed - if it works, then swap them and try the other. If both work as a single stick, then I think we know that the Macbook really does have trouble with a full 4 GB. If either of them doesn't work that way, then it's definitely a bad stick.
 
I just installed one 2 gig with my computer...very smooth upgrade. Saw this thread and you got me wanting to upgrade to another 2gb.
 
After reading this, I'm definitely gonna buy 4GB of RAM when I get a MacBook or MacBook Pro in a couple of months. :D
 
Ok. A little update: after some attempts to run memory-hog programs and the memtest, it seems that the system does manage to address over the 3.3GB limit, but goes into serious shock, and I've gotten both the "you need to restart your computer" panic, as well as the gray-screen panic.

Apple hardware tests are fine; if i pop one dimm out, the other works fine (obviously in single channel mode) at 2gb; tested in my dell e1505, they work and address perfectly as well.

So, from what I can tell, it's a huge fluke that it can be recognized, and that when it does attempt to address, it flies into a panic and ceases to work. Anyone have any ideas on how to fix it? It would totally rock.
 
Anyone have any ideas on how to fix it? It would totally rock.

Unfortunately, you can't fix it. It is a chipset limitation. I posted an Intel technical document on the subject earlier in the thread. That document confirms that any computer using the Mobile Express 945 chipset as found in the MacBook will be able to recognize 4GB of installed memory but unable to address a significant upper portion that's reserved for APIC and PCI Express.
 
Anyone know exactly how much is reserved for APIC and PCI Express? i.e if only .5 Gb are reserved, we can still use 3.5GB of Memory making the 4GB sticks worth it. Useful excerpts?

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The enhanced PCI Express configuration access mechanism utilizes a flat memory-
mapped address space to access device configuration registers. This address space is
reported by the system firmware to the operating system. PCIEXBAR defines the base
address for a 64-, 128-, or 256-MB block of addresses below the top of addressable
memory (currently 4 GB) for the configuration space associated with all devices and
functions that are potentially a part of the PCI Express root complex hierarchy. The PCI
Express Configuration Transaction Header includes an additional 4 bits (Extended
Register Address[3:0]) between the function number and register address fields to
provide indexing into the 4 KB of configuration space allocated to each potential device.
For PCI Compatible Configuration Requests, the Extended Register Address field must
be all 0’s.
 
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