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Possible PowerBook G5 discovered!
- Thread starter Anonymous Freak
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had a Pismo 500mhz (so a G3) build libgcc7, gcc7, Python39 with macport once. took 4 days .
This is similar to how long it took on my 466MHz G3 iBook — roughly a bit over four days.
For 500 MHz laptop not bad perhaps.
P. S. I found out that I could set up a local server on the Quad and set it as a archive site for G4, then no need to compile on the latter.
Try DosDude - he is a wizard to get for you what you need. He can take an MDD 1.25 and make it 2 dual 2ghz.
That’s correct. Unlike the Pismo/final PowerBook G3 board, a ZIF socket doesn’t exist on PowerBook G4s (both the Titanium and Aluminium editions).
That's not to say that CPU upgrades don't exist at all, but they require significant modifications to the logic board and is basically permanent.
I am aware of a time where it was either Sonnet or some other company offered PBG4 CPU upgrades so it's definitely possible but not particularly practical, even then let alone now.
I am aware of a time where it was either Sonnet or some other company offered PBG4 CPU upgrades so it's definitely possible but not particularly practical, even then let alone now.
If one turns up it’s probably going to cost a pretty penny due to collectibility ‘n’ stuff.
Some reviews I managed to dig up…
Review of Daystar G4 1.75GHz CPU Upgrade for PowerBook G4
Review of Daystar's 1.75GHz CPU upgrade for AL PowerBook G4.
web.archive.org
Review of Daystar G4 1.92GHz CPU Upgrade for PowerBook G4
Review of Daystar's 1.92GHz Powerbook G4 CPU upgrade. Includes notes on Heat, Performance and some problems seen.
web.archive.org
It’s so ironic that the person who had the 1.92 GHz upgrade done says they can’t get an Intel Mac because… Virtual PC doesn’t run on them.
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Yes, unless someone is just getting rid of it (sometimes happens, mostly in auctions).
Specs aren′t hugely impressive (expectedly): https://barefeats.com/pb183.html
P. S. Strangely enough, web-page is still up: https://daystartechnology.com/Apple...ducts/Mac_CPU_G4_Upgrade_PowerBook_AL_PS.html
I’ve added two more reviews to my previous post. But as you say, a single G4 only gets you so far.
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I did get a PowerBook eventually, but just compiled heavy stuff booting the Quad from a Tiger installation I use on PB. But basically most of software compiles bearably [un]fast. Only gcc is a pain.
So... Ahem... I'm a bit sorry to resurrect this old thread. But, you know, I think I may have found something important. You know, for quite a very long time, I've been searching for a Power Mac G5 schematic, or at least a glimpse of it, maybe a confirmation that it exists at all... What I've been finding instead is mostly iMac G5 schematics, with the occasional iMac G4 thrown in for a bit of fun.
You can always tell what you're looking at, because the G4-based Macs all have the big 'Intrepid' chip in the middle of their system block diagram, along with some sort of 'Apollo' CPU, while the G5 CPU is always labelled 'Neo 10s' and is connected to either 'U3lite' (because those are iMac schematics, not the Power Mac with full-blown 'U3') or 'Kodiak' (which is the IBM-designed chip used in some of the later G5-based systems, also affectionately known as 'U4'). 'Shasta' and 'Vesta' are also always present in G5-based designs, because those are the actual chips implementing on-board IO, like USB, Ethernet, Firewire, etc.
So yeah, I've been searching for a possible G5 schematic, downloading everything I find along the way... But today I've found something that immediately caught my eye. Actually, I found it earlier, it's just that I didn't come around to downloading and looking at it properly before.
There was this one schematic which didn't seem to relate to anything else. The iMacs are usually clearly labelled 'IMG5', 'IMAC G5' or something like that. Sometimes they have some boring names, like 'Seedy' or 'Sinclair'. But this schematic, it was simply titled 'LINK'. Now that's an intersting name. And no iMac label in sight. Also, the schematic was marked as 'EVT'. That, ladies, gentlemen and all in between, stands for 'Engineering Validation Test', and is the earliest of the prototyping stages.
Now, bearing all of the above in mind, I invite you now, to take a look at this:
First thing... Okay, 'NEO 10S', we've got a G5-based Mac. 'U3LITE', one of the earlier ones. 'ATI M11' integrated graphics, so not a Power Mac, goddamit.
Second thing... SODIMM? None of the iMac G5 schematics have SODIMM slots on them. But, you know, I don't have any idea what Apple's product stack looked like in mid 2000s, maybe they had an iMac with SODIMM slots. Who knows? Not me.
Third thing... Okay, 'U3LITE' connected to 'SHASTA', that's okay, everything's as usual... But then there's USB 2.0, and w- what's that? 'USB Trackpad'? 'KB LED'? ('KB LED' commonly stands for keyboard LED) Well, maybe there's some sort of weird thing going on where they were including trackpads/keyboards with the G5 iMacs, and they decided to put them on the block d-
Don't tell me there's a block titled 'Battery Connector' in the top-left corner that I haven't noticed because I was looking at the CPU before looking at everything else... ... ... Yeah, there is...
...
...
Okay, so one more thing before I leave you with your own thoughts about this, because I'm sure you might have plenty. Here's the next sheet in the schematic:
Here, apparently, Apple engineers were trying to make sense of the power draw of this whole thing. Now, this is just fun, and confirms the notion that PBG5 was scrapped for power draw reasons. Not to mention, it probably wasn't that good in terms of performance either, since the G5 chip would have probably been running at 0.6-1.2 GHz (PI bus is running at 600 MHz as per the first image, core frequency is an integer multiple of that, but clearly not 1.8).
The schematic in question is attached to this message.
You can always tell what you're looking at, because the G4-based Macs all have the big 'Intrepid' chip in the middle of their system block diagram, along with some sort of 'Apollo' CPU, while the G5 CPU is always labelled 'Neo 10s' and is connected to either 'U3lite' (because those are iMac schematics, not the Power Mac with full-blown 'U3') or 'Kodiak' (which is the IBM-designed chip used in some of the later G5-based systems, also affectionately known as 'U4'). 'Shasta' and 'Vesta' are also always present in G5-based designs, because those are the actual chips implementing on-board IO, like USB, Ethernet, Firewire, etc.
So yeah, I've been searching for a possible G5 schematic, downloading everything I find along the way... But today I've found something that immediately caught my eye. Actually, I found it earlier, it's just that I didn't come around to downloading and looking at it properly before.
There was this one schematic which didn't seem to relate to anything else. The iMacs are usually clearly labelled 'IMG5', 'IMAC G5' or something like that. Sometimes they have some boring names, like 'Seedy' or 'Sinclair'. But this schematic, it was simply titled 'LINK'. Now that's an intersting name. And no iMac label in sight. Also, the schematic was marked as 'EVT'. That, ladies, gentlemen and all in between, stands for 'Engineering Validation Test', and is the earliest of the prototyping stages.
Now, bearing all of the above in mind, I invite you now, to take a look at this:
First thing... Okay, 'NEO 10S', we've got a G5-based Mac. 'U3LITE', one of the earlier ones. 'ATI M11' integrated graphics, so not a Power Mac, goddamit.
Second thing... SODIMM? None of the iMac G5 schematics have SODIMM slots on them. But, you know, I don't have any idea what Apple's product stack looked like in mid 2000s, maybe they had an iMac with SODIMM slots. Who knows? Not me.
Third thing... Okay, 'U3LITE' connected to 'SHASTA', that's okay, everything's as usual... But then there's USB 2.0, and w- what's that? 'USB Trackpad'? 'KB LED'? ('KB LED' commonly stands for keyboard LED) Well, maybe there's some sort of weird thing going on where they were including trackpads/keyboards with the G5 iMacs, and they decided to put them on the block d-
Don't tell me there's a block titled 'Battery Connector' in the top-left corner that I haven't noticed because I was looking at the CPU before looking at everything else... ... ... Yeah, there is...
...
...
Okay, so one more thing before I leave you with your own thoughts about this, because I'm sure you might have plenty. Here's the next sheet in the schematic:
Here, apparently, Apple engineers were trying to make sense of the power draw of this whole thing. Now, this is just fun, and confirms the notion that PBG5 was scrapped for power draw reasons. Not to mention, it probably wasn't that good in terms of performance either, since the G5 chip would have probably been running at 0.6-1.2 GHz (PI bus is running at 600 MHz as per the first image, core frequency is an integer multiple of that, but clearly not 1.8).
The schematic in question is attached to this message.
Remember if this is "the real thing" it was not meant for any G5 that ever existed but made in anticipation of one that went trough a massive node shrink.
Clock by clock a G5 isn't really that much faster than a G4 and 64Bit wasn't important yet as 2GB (or 3.5) would be be plenty of years to come.
IBM never got around to delivering that new G5 (or would it been called "G6"?) and the Intel switch happened because they could supply both chips suitable for laptops and high end desktops (aka MacPro).
Sooo... Correct me if I'm wrong, but I've always thought that the 970FX chip that powers the first and second PMG5 refreshes and the 970MP chip that powers the third refresh, supposedly were the chips that Apple was promised, except that their power draw was significantly higher than expected due to Dennard scaling going 'see ya' at around at that point.
Like, the story always goes that the first G5 Power Macs had the 130nm 970 chip, and as IBM engineers were working on a 90nm shrink in the background (the 970FX), which would supposedly reach 3 GHz as per Dennard scaling, Apple announced the plans to reach 3 GHz. And then it turned out that Dennard scaling doesn't work anymore, transistors draw too much power due to leakage current, and thusly, no 3 GHz.
They still released the chip as planned, and put it in the newer G5s, it just wasn't as good as they wanted it to be. Therefore 2.7 GHz, therefore liquid cooling, therefore Apple jumping ship to Intel.
And all of this very much checks out with things I know about microprocessor design. Let's just say, a smart dude once told me that 90nm is pretty much the point where you start to have to take leakage current into account. 180nm? Nah. 130nm? Eeeehhhh..... 90nm? Definitely.
Another thing about node shrinks, is they don't give you more performance per GHz. They used to give you way more performance per watt, so that you could either keep your TDP and increase your gigahertzes or decrease your TDP and leave the gigahertzes the same. But they never ever gave you any more performance per GHz. This metric is usually called IPC (average amount of Instructions executed Per Cycle), and is dependent solely upon the actual chip microarchitecture design: cache and memory subsystem efficiency, branch prediction efficiency, superscalarity, etc...
So even the perfect shrunk-down 970 that has only existed in IBM engineers' dreams, when running at the same frequency as the real 970, would have the same performance. The difference is, it wouldn't generate as much heat as the real 970fx.
Or, sorry, am I completely misunderstanding and instead you mean that they would've increased the frequency while staying at the same power budget? Cuz, like, to me it seems like the power budget for PBG5 is quite bad as it is as per the EVT schematic, so surely they would've been aiming to improve it, no?
What I am saying is that even a 1.8GHz G5 wouldn't have been much of an upgrade over the 1.67GHz G4s used in the last PowerBook.
So either go even higher or dual core (which is what PASemi was aiming for).
That would have been for the final product, your schematic might have been for an early feasibility study/prototype.
So either go even higher or dual core (which is what PASemi was aiming for).
That would have been for the final product, your schematic might have been for an early feasibility study/prototype.
That obviously depends on the task at hand, but for compute bound integer is pretty close, anything memory bound will be won by the G5 (since there just isn't any G4 system with a good RAM interface) while tests involving Altivec might even be won by the G4.
You know, I wanted to test that to be certain-- one of my planned side-by-side reviews a lot like the Aluminium v Titanium G4 look I did or at one point I had planned for a 12" PowerBook G4 vs 12" iBook G4 look before Surcouf died.
Unfortunately there isn't any stock configuration of G4s and G5s that match clock speeds-- no G4 had a 1.60GHz clock nor anything faster than 1.67.
While aftermarket G4s did have 1.8 and even 2.0GHz clocks which would allow for such a comparison it seems a disservice to do so, especially as these G4 upgrades are extremely rare and cost-probihitive.