TSMC Demos Next-Gen Chip Technology to Apple Ahead of 2025 Debut

[MacRumors]

TSMC has already demonstrated prototype 2nm chips to Apple ahead of their expected introduction in 2025, the Financial Times reports.

Apple is said to be closely aligned with TSMC in the race to develop and implement 2nm chip technology, which will surpass their current 3nm chips and associated nodes in terms of transistor density, performance, and efficiency. 2nm chips are expected to be integral in underpinning future Apple silicon chips, as well as next-generation data center and artificial intelligence technology. Test results for TSMC's "N2" 2nm prototype chips have already been showcased to Apple and several other key TSMC clients as plans for upcoming chips begin to solidify.

In a separate report, DigiTimes points out that Apple is a key player in TSMC's battle against Samsung and Intel to bring 2nm chips to market, with no sign of the close relationship between the two companies waning. Apple reportedly has no plans to reduce its 3nm or 2nm chip orders from TSMC before 2027 at the earliest.

Apple was the first company to utilize TSMC's 3nm technology with the A17 Pro chip in the iPhone 15 Pro and iPhone 15 Pro Max, and the company is likely to follow suit with the chipmaker's N2 chips. TSMC's production of 2nm chips is slated to begin in 2025, with their first appearance in Apple devices likely to follow soon after.

Article Link: TSMC Demos Next-Gen Chip Technology to Apple Ahead of 2025 Debut

 

[TheDailyApple]

At this rate they‘ll have to start shrinking the atoms

 

[adamw]

Smaller 2nm is always welcome! Maybe in the M5 or M6 series of chips (2025 or 2026)?

 

[Maclver]

Just curious what happens beyond 1nm?

 

[Zest28]

At this rate they‘ll have to start shrinking the atoms

No they don't. 2nm is just a marketing label.

Just like the "Pro" label on the iPad and the MacBook.

 

[marco114]

just think, the first iPhones were built using a 90nm chip!

 

[Yvan256]

Cue all the "My new M3 Mac that I haven't bought yet is already out of date" comments.

 

[Zest28]

Just curious what happens beyond 1nm?

Yes, TSMC will use an even smaller marketing label. These chips are not 2nm across in size. It's just marketing. So they can name it whatever they want.

 

[coolfactor]

Just curious what happens beyond 1nm?

Once they run out of nanometers, they'll switch to organic electronics, and the machines will officially be alive. /s

 

[coolfactor]

Yes, TSMC will use an even smaller marketing label. These chips are not 2nm across in size. It's just marketing. So they can name it whatever they want.

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

 

[Fender2112]

/yawn

Call me when they get to 0.5nm

 

[robertmorris2]

Next: invisible chips

 

[Zest28]

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

2 nm don't actually refer to any physical dimension of the transistor. Its just a marketing term.

5nm from Samsung and 5nm TSMC are not the same at all, nor is 10nm from Intel vs 10nm from TSMC.

Intel was even trying to pass on their 10nm chips as "7nm" due to how TSMC defines it's nanometers.

 

[JippaLippa]

It's crazy how technology improves so quickly these days.
I'm waiting for the M3 Ultra and I already feel it's obsolete!

 

[Return Zero]

Just curious what happens beyond 1nm?

picometers or angstroms

but also theoretical estimates are between 0.5 and 1nm when using silicon will be somewhat of a limit, until we get drastically different materials or methods involved

 

[sunny5]

The real question is will Apple use chiplet or 3D fabric tech to change the entire chip design Apple Silicon chip? Otherwise, Apple will still stuck with limited chip design as Ultra chip is only as powerful as RTX 4060 or entry GPU.

 

[ph001bi]

Just curious what happens beyond 1nm?

0.95?

 

[oneMadRssn]

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

Eh, 2nm is getting to the point of impossible if it means the entire transistor. A silicon atom is 0.13nm diameter. This would mean the entire transistor is 15 atoms wide. That's not technically impossible, but it's pretty darn close.

Also, not all transistors are the same size. A modern SoC will have dozens of different transistors types on it, of varying sizes. So measuring the smallest transistor doesn't really mean much if most of them are larger.

Rather, my understanding is that since about 65nm, TSMC has switched from measuring the size of the transistor to the width of the gate, or the width of the channel; which is a smaller subcomponent of the transistor. But having a gate width of 15 silicon atoms is more believable, since that means the entire transistor would be roughly twice as wide. And it tells you a bit more about the tech, since knowing the smallest feature size is still useful for the larger transistors on the die.

 

[What's a computer?]

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

Erm... no. According to the IEEE, the "2 nm" node anticipated for 2025 refers to a transistor size ranging from 12 nm to 45 nm. Features smaller than 12 nm aren't expected any time in the foreseeable future:

IRDS™ 2021: More Moore - IEEE IRDS™

irds.ieee.org

The IEEE is the Institute of Electrical and Electronics Engineers, and a reliable source.
Wikipedia says 45 nm, which may be the most relevant for CPUs:

2 nm process - Wikipedia

en.wikipedia.org

Edited to add: @oneMadRssn pointed out that the measures I cited above, such as "12 nm" and "45 nm", are technically the _gate_ sizes, which are smaller than the _entire_ transistor. Anyway, a feature 2 nm across would be 9 silicon atoms across, resulting in a device too unreliable to use at any temperature, even if manufacturing were perfect.

 

[JamieLannister]

Realistically, transistors won’t reach a length of 3 nm in the next 20 years, regardless of any metric. The term “3nm” is primarily a marketing gimmick used by manufacturers to indicate that their new semiconductors are superior to previous ones.

Transistor Node Sizes

 

[HobeSoundDarryl]

Just curious what happens beyond 1nm?

Since the vast majority of people only care about an annual single digit decrease, they can- at any time- carve up whatever actual shrink is really left, alter the measure, and then work it down from there for the next XXX++ years.

Analogy: Measure some purchase in hundreds of dollars: $900 cut to $800 cut to $700... cut to $200... "just curious what happens beyond $100..."

• No problem at all- we will now measure in tens: $90, $80, $70, etc. "Just curious what happens beyond $10"
• No problem at all- we will now measure in dollars: $9, $8, $7, etc. "Just curious, what happens beyond $1"
• No problem at all- we will now measure in cents: 99¢, 98¢, 97¢ "Just curious, what happens beyond 1¢"
• No problem at all- we will now measure in fractions of cents like the 9/10ths at the end of gas station fees. "And when it gets to 1/10th of 1¢?"
• No problem at all- will now measure in hundredths.
• And so on.

Back to chip sizing: there are abundant measuring terms below nanometer... to keep single digit size countdowns going for the rest of all of our lives and then some... and then some more: nano can become pico, then femto, then atto, zepto, yocto, rondo and quecto. "Just curious, what happens beyond quecto?" None of us will even be in someone's faintest memories by then but somebody will happily layer in more measure prefixes as needed.

Where there's marketing will, there's always marketing way.

 

[Sim2032]

To build on some of the answers others have given, node procession as a numerical value really is a marketing exercise at this point. The underlying progression still generally refers to efficiency and to a lesser extent transistor count, but the technologies that get there aren't a simple shrinking anymore. Areas such as 3D packaging and all around the gate designs used to reduce leakage (and thus boost efficiency) are just some of the technologies involved.

 

[Chuckeee]

The real question is will Apple use chiplet or 3D fabric tech to change the entire chip design Apple Silicon chip? Otherwise, Apple will still stuck with limited chip design as Ultra chip is only as powerful as RTX 4060 or entry GPU.

I’m not sure but I thought I read somewhere that the use of chiplets were anticipated around M8.

 

[decypher44]

Learn something new every day! Good stuff. I honestly did not know the “Xnm” was really just marketing.

It reminds me of AT&T labeling their pre-new standard over their current.

 

[Will Co]

You didn’t answer the question. What does it refer to?

These are relative terms meant to indicate that a new process produces more efficient transistors than the previous one. It can indicate a reduction in actual transistor size but improvements can also come from other techniques used to improve matters. It used to be the case that the node size used by manufacturers DID match the smallest feature size of a transistor but that stopped being the case when it wasn't possible to keep reducing the actual size significantly and other techniques became more significant or just as significant. So they kept reducing the node size number to indicate improvements, breaking the link between stated size and actual size. It is now just a marketing term and therefore it doesn't make sense to compare the stated sizes. TSMC 2nm != Intel 2nm.