Then we measure in Angstrom instead.Just curious what happens beyond 1nm?
Factor | Name | Symbol |
10⁻⁹ | nano | n |
10⁻¹² | pico | p |
10⁻¹⁵ | femto | f |
Oh, come on now! I know they’re small, but why bring Snow White’s dwarves into the conversation?….pico, then femto, then atto, zepto, yocto, rondo and quecto.
This is informative.Erm... no. According to the IEEE, the "2 nm" node anticipated for 2025 refers to a transistor size ranging from 12 nm to 45 nm. Features smaller than 12 nm aren't expected any time in the foreseeable future:
The IEEE is the Institute of Electrical and Electronics Engineers, and a reliable source.![]()
IRDS™ 2021: More Moore - IEEE IRDS™
irds.ieee.org
Wikipedia says 45 nm, which may be the most relevant for CPUs:
Edited to add: @oneMadRssn pointed out that the measures I cited above, such as "12 nm" and "45 nm", are technically the _gate_ sizes, which are smaller than the _entire_ transistor. Anyway, a feature 2 nm across would be 9 silicon atoms across, resulting in a device too unreliable to use at any temperature, even if manufacturing were perfect.2 nm process - Wikipedia
en.wikipedia.org
My M3 Mac which I have yet to buy is already out of date!Cue all the "My new M3 Mac that I haven't bought yet is already out of date" comments.
Planck units.Just curious what happens beyond 1nm?
2nm is in the ~80-100 atoms wide range, so definitely not there yet.At this rate they‘ll have to start shrinking the atoms
While this isn’t entirely incorrect, I think the “it’s all marketing” explanations have been put out by intel and their benefactors as they haven’t been able to make progress in process shrinkage so getting people to think it’s all marketing is to their benefit. Transistor size leads to transistor density per die area, and that is continuing to scale in proportion to these “marketing” process names.To build on some of the answers others have given, node procession as a numerical value really is a marketing exercise at this point. The underlying progression still generally refers to efficiency and to a lesser extent transistor count, but the technologies that get there aren't a simple shrinking anymore. Areas such as 3D packaging and all around the gate designs used to reduce leakage (and thus boost efficiency) are just some of the technologies involved.
The first product with chiplet is rumored to release in 2025.I’m not sure but I thought I read somewhere that the use of chiplets were anticipated around M8.
They would likely go to picometer then femtometer.Planck units.
Let's hope it's slow in 2025. That should mean the software team has incorporated massive new functionality, continuing to drive innovation (or everything went electron). The truth is Apple has plenty of experience incorporating software features in new OS's such that they balance slowing down older phones with new features being added. I wouldn't expect a 15 Pro Max to feel slow in 2025, but maybe a bit sluggish in 2026-27 and have plenty of new features but missing some of the latest and greatest stuff that the iPhone 18 can do.Bring it on my 15 Pro Max will be slow in 2025
Yeah I feel like we're gonna drive off the silicon cliff by the end of this decade.At this rate they‘ll have to start shrinking the atoms
That is just a complete arbitrary number, there are approximately 6.022 x 10^7 atoms in 1 nanometer based on a cubic packing and an average atomic radius.Just curious what happens beyond 1nm?
4060? Maybe in some unoptimized tasks, but in what its designed for, it’s already beating 4090 at 1/4th the energy cost.The real question is will Apple use chiplet or 3D fabric tech to change the entire chip design Apple Silicon chip? Otherwise, Apple will still stuck with limited chip design as Ultra chip is only as powerful as RTX 4060 or entry GPU.